1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 DENX Software Engineering
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
9 #include <fdt_support.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/imx-regs.h>
15 #include <asm/arch/iomux.h>
16 #include <asm/arch/mx6-pins.h>
17 #include <asm/arch/mx6-ddr.h>
18 #include <asm/arch/sys_proto.h>
23 #include <asm/mach-imx/iomux-v3.h>
24 #include <asm/mach-imx/boot_mode.h>
30 #include <dm/platform_data/serial_mxc.h>
31 #include <dm/platdata.h>
35 DECLARE_GLOBAL_DATA_PTR;
37 static bool hw_ids_valid;
38 static bool sw_ids_valid;
42 const char *gpio_table_sw_names[] = {
43 "GPIO2_4", "GPIO2_5", "GPIO2_6", "GPIO2_7"
46 const char *gpio_table_sw_ids_names[] = {
47 "sw0", "sw1", "sw2", "sw3"
50 const char *gpio_table_hw_names[] = {
51 "GPIO6_7", "GPIO6_9", "GPIO6_10", "GPIO6_11",
52 "GPIO4_7", "GPIO4_11", "GPIO4_13", "GPIO4_15"
55 const char *gpio_table_hw_ids_names[] = {
56 "hw0", "hw1", "hw2", "hw3", "hw4", "hw5", "hw6", "hw7"
59 static int get_board_id(const char **pin_names, const char **ids_names,
60 int size, bool *valid, u32 *id)
62 struct gpio_desc desc;
67 for (i = 0; i < size; i++) {
68 memset(&desc, 0, sizeof(desc));
70 ret = dm_gpio_lookup_name(pin_names[i], &desc);
72 printf("Can't lookup request SWx gpios\n");
76 ret = dm_gpio_request(&desc, ids_names[i]);
78 printf("Can't lookup request SWx gpios\n");
82 dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN);
84 val = dm_gpio_get_value(&desc);
86 printf("Can't get SW%d ID\n", i);
99 gd->ram_size = imx_ddr_size();
104 iomux_v3_cfg_t const misc_pads[] = {
105 /* Prod ID GPIO pins */
106 MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
107 MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL),
108 MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL),
109 MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
111 /* HW revision GPIO pins */
112 MX6_PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
113 MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
114 MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
115 MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
116 MX6_PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
117 MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
118 MX6_PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL),
119 MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
122 MX6_PAD_GPIO_3__XTALOSC_REF_CLK_24M | MUX_PAD_CTRL(NO_PAD_CTRL),
124 /* Emergency recovery pin */
125 MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
129 * Do not overwrite the console
130 * Always use serial for U-Boot console
132 int overwrite_console(void)
137 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
138 int ft_board_setup(void *blob, bd_t *bd)
140 fdt_fixup_ethernet(blob);
145 int board_phy_config(struct phy_device *phydev)
147 /* display5 due to PCB routing can only work with 100 Mbps */
148 phydev->advertising &= ~(ADVERTISED_1000baseX_Half |
149 ADVERTISED_1000baseX_Full |
150 SUPPORTED_1000baseT_Half |
151 SUPPORTED_1000baseT_Full);
153 if (phydev->drv->config)
154 return phydev->drv->config(phydev);
161 struct gpio_desc phy_int_gbe, spi2_wp;
164 debug("board init\n");
165 /* address of boot parameters */
166 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
168 /* Setup misc (application specific) stuff */
169 SETUP_IOMUX_PADS(misc_pads);
171 get_board_id(gpio_table_sw_names, &gpio_table_sw_ids_names[0],
172 ARRAY_SIZE(gpio_table_sw_names), &sw_ids_valid, &unit_id);
173 debug("SWx unit_id 0x%x\n", unit_id);
175 get_board_id(gpio_table_hw_names, &gpio_table_hw_ids_names[0],
176 ARRAY_SIZE(gpio_table_hw_names), &hw_ids_valid, &cpu_id);
177 debug("HWx cpu_id 0x%x\n", cpu_id);
179 if (hw_ids_valid && sw_ids_valid)
180 printf("ID: unit type 0x%x rev 0x%x\n", unit_id, cpu_id);
184 /* Setup low level FEC (ETH) */
185 ret = dm_gpio_lookup_name("GPIO1_28", &phy_int_gbe);
187 printf("Cannot get GPIO1_28\n");
189 ret = dm_gpio_request(&phy_int_gbe, "INT_GBE");
191 dm_gpio_set_dir_flags(&phy_int_gbe, GPIOD_IS_IN);
194 iomuxc_set_rgmii_io_voltage(DDR_SEL_1P5V_IO);
195 enable_fec_anatop_clock(0, ENET_125MHZ);
197 /* Setup #WP for SPI-NOR memory */
198 ret = dm_gpio_lookup_name("GPIO7_0", &spi2_wp);
200 printf("Cannot get GPIO7_0\n");
202 ret = dm_gpio_request(&spi2_wp, "spi2_#wp");
204 dm_gpio_set_dir_flags(&spi2_wp, GPIOD_IS_OUT |
205 GPIOD_IS_OUT_ACTIVE);
211 #ifdef CONFIG_CMD_BMODE
212 static const struct boot_mode board_boot_modes[] = {
213 /* eMMC, USDHC-4, 8-bit bus width */
214 /* SPI-NOR, ECSPI-2 SS0, 3-bytes addressing */
215 {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)},
216 {"spinor", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x09)},
220 static void setup_boot_modes(void)
222 add_board_boot_modes(board_boot_modes);
225 static inline void setup_boot_modes(void) {}
228 int misc_init_r(void)
230 struct gpio_desc em_pad;
235 ret = dm_gpio_lookup_name("GPIO3_29", &em_pad);
237 printf("Can't find emergency PAD gpio\n");
241 ret = dm_gpio_request(&em_pad, "Emergency_PAD");
243 printf("Can't request emergency PAD gpio\n");
247 dm_gpio_set_dir_flags(&em_pad, GPIOD_IS_IN);