board/keymile/kmp204x/ddr.c

   1 /*
   2  * (C) Copyright 2013 Keymile AG
   3  * Valentin Longchamp <valentin.longchamp@keymile.com>
   4  *
   5  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8   */
   9
  10 #include <common.h>
  11 #include <i2c.h>
  12 #include <hwconfig.h>
  13 #include <asm/mmu.h>
  14 #include <fsl_ddr_sdram.h>
  15 #include <fsl_ddr_dimm_params.h>
  16
  17 DECLARE_GLOBAL_DATA_PTR;
  18
  19 void fsl_ddr_board_options(memctl_options_t *popts,
  20                                 dimm_params_t *pdimm,
  21                                 unsigned int ctrl_num)
  22 {
  23         if (ctrl_num) {
  24                 printf("Wrong parameter for controller number %d", ctrl_num);
  25                 return;
  26         }
  27
  28         /* automatic calibration for nb of cycles between read and DQS pre */
  29         popts->cpo_override = 0xFF;
  30
  31         /* 1/2 clk delay between wr command and data strobe */
  32         popts->write_data_delay = 4;
  33         /* clk lauched 1/2 applied cylcle after address command */
  34         popts->clk_adjust = 4;
  35         /* 1T timing: command/address held for only 1 cycle */
  36         popts->twot_en = 0;
  37
  38         /* we have only one module, half str should be OK */
  39         popts->half_strength_driver_enable = 1;
  40
  41         /* wrlvl values overridden as recommended by ddr init func */
  42         popts->wrlvl_override = 1;
  43         popts->wrlvl_sample = 0xf;
  44         popts->wrlvl_start = 0x6;
  45
  46         /* Enable ZQ calibration */
  47         popts->zq_en = 1;
  48
  49         /* DHC_EN =1, ODT = 75 Ohm */
  50         popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR_ODT_75ohm;
  51 }
  52
  53 int dram_init(void)
  54 {
  55         phys_size_t dram_size = 0;
  56
  57         puts("Initializing with SPD\n");
  58
  59         dram_size = fsl_ddr_sdram();
  60
  61         dram_size = setup_ddr_tlbs(dram_size / 0x100000);
  62         dram_size *= 0x100000;
  63
  64         debug("    DDR: ");
  65         gd->ram_size = dram_size;
  66
  67         return 0;
  68 }