f7f2e2c52594d5b8b6f59ae4d13651f8757e7657
[oweals/u-boot.git] / board / highbank / highbank.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2010-2011 Calxeda, Inc.
4  */
5
6 #include <common.h>
7 #include <ahci.h>
8 #include <cpu_func.h>
9 #include <env.h>
10 #include <net.h>
11 #include <netdev.h>
12 #include <scsi.h>
13
14 #include <linux/sizes.h>
15 #include <asm/io.h>
16
17 #define HB_AHCI_BASE                    0xffe08000
18
19 #define HB_SCU_A9_PWR_STATUS            0xfff10008
20 #define HB_SREG_A9_PWR_REQ              0xfff3cf00
21 #define HB_SREG_A9_BOOT_SRC_STAT        0xfff3cf04
22 #define HB_SREG_A9_PWRDOM_STAT          0xfff3cf20
23 #define HB_SREG_A15_PWR_CTRL            0xfff3c200
24
25 #define HB_PWR_SUSPEND                  0
26 #define HB_PWR_SOFT_RESET               1
27 #define HB_PWR_HARD_RESET               2
28 #define HB_PWR_SHUTDOWN                 3
29
30 #define PWRDOM_STAT_SATA                0x80000000
31 #define PWRDOM_STAT_PCI                 0x40000000
32 #define PWRDOM_STAT_EMMC                0x20000000
33
34 #define HB_SCU_A9_PWR_NORMAL            0
35 #define HB_SCU_A9_PWR_DORMANT           2
36 #define HB_SCU_A9_PWR_OFF               3
37
38 DECLARE_GLOBAL_DATA_PTR;
39
40 void cphy_disable_overrides(void);
41
42 /*
43  * Miscellaneous platform dependent initialisations
44  */
45 int board_init(void)
46 {
47         icache_enable();
48
49         return 0;
50 }
51
52 /* We know all the init functions have been run now */
53 int board_eth_init(bd_t *bis)
54 {
55         int rc = 0;
56
57 #ifdef CONFIG_CALXEDA_XGMAC
58         rc += calxedaxgmac_initialize(0, 0xfff50000);
59         rc += calxedaxgmac_initialize(1, 0xfff51000);
60 #endif
61         return rc;
62 }
63
64 #ifdef CONFIG_SCSI_AHCI_PLAT
65 void scsi_init(void)
66 {
67         u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
68
69         cphy_disable_overrides();
70         if (reg & PWRDOM_STAT_SATA) {
71                 ahci_init((void __iomem *)HB_AHCI_BASE);
72                 scsi_scan(true);
73         }
74 }
75 #endif
76
77 #ifdef CONFIG_MISC_INIT_R
78 int misc_init_r(void)
79 {
80         char envbuffer[16];
81         u32 boot_choice;
82
83         boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
84         sprintf(envbuffer, "bootcmd%d", boot_choice);
85         if (env_get(envbuffer)) {
86                 sprintf(envbuffer, "run bootcmd%d", boot_choice);
87                 env_set("bootcmd", envbuffer);
88         } else
89                 env_set("bootcmd", "");
90
91         return 0;
92 }
93 #endif
94
95 int dram_init(void)
96 {
97         gd->ram_size = SZ_512M;
98         return 0;
99 }
100
101 #if defined(CONFIG_OF_BOARD_SETUP)
102 int ft_board_setup(void *fdt, bd_t *bd)
103 {
104         static const char disabled[] = "disabled";
105         u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
106
107         if (!(reg & PWRDOM_STAT_SATA))
108                 do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
109                         disabled, sizeof(disabled), 1);
110
111         if (!(reg & PWRDOM_STAT_EMMC))
112                 do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
113                         disabled, sizeof(disabled), 1);
114
115         return 0;
116 }
117 #endif
118
119 static int is_highbank(void)
120 {
121         uint32_t midr;
122
123         asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
124
125         return (midr & 0xfff0) == 0xc090;
126 }
127
128 void reset_cpu(ulong addr)
129 {
130         writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
131         if (is_highbank())
132                 writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
133         else
134                 writel(0x1, HB_SREG_A15_PWR_CTRL);
135
136         wfi();
137 }
138
139 /*
140  * turn off the override before transferring control to Linux, since Linux
141  * may not support spread spectrum.
142  */
143 void arch_preboot_os(void)
144 {
145         cphy_disable_overrides();
146 }