4 #include <asm-generic/gpio.h>
5 #include <linux/delay.h>
8 #include "dt_helpers.h"
17 static struct porttype {
18 bool phy_invert_in_pol;
19 bool phy_invert_out_pol;
26 static void ihs_phy_config(struct phy_device *phydev, bool qinpn, bool qoutpn)
32 /* enable QSGMII autonegotiation with flow control */
33 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0004);
34 reg = phy_read(phydev, MDIO_DEVAD_NONE, 16);
36 phy_write(phydev, MDIO_DEVAD_NONE, 16, reg);
39 * invert QSGMII Q_INP/N and Q_OUTP/N if required
40 * and perform global reset
42 reg = phy_read(phydev, MDIO_DEVAD_NONE, 26);
48 phy_write(phydev, MDIO_DEVAD_NONE, 26, reg);
50 /* advertise 1000BASE-T full-duplex only */
51 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000);
52 reg = phy_read(phydev, MDIO_DEVAD_NONE, 4);
54 phy_write(phydev, MDIO_DEVAD_NONE, 4, reg);
55 reg = phy_read(phydev, MDIO_DEVAD_NONE, 9);
56 reg = (reg & ~0x300) | 0x200;
57 phy_write(phydev, MDIO_DEVAD_NONE, 9, reg);
60 reg = phy_read(phydev, MDIO_DEVAD_NONE, 16);
62 phy_write(phydev, MDIO_DEVAD_NONE, 16, reg);
65 uint calculate_octo_phy_mask(void)
68 uint octo_phy_mask = 0;
69 struct gpio_desc gpio = {};
71 static const char * const dev_name[] = {"pca9698@23", "pca9698@21",
72 "pca9698@24", "pca9698@25",
75 /* mark all octo phys that should be present */
76 for (k = 0; k < 5; ++k) {
77 snprintf(gpio_name, 64, "cat-gpio-%u", k);
79 if (request_gpio_by_name(&gpio, dev_name[k], 0x20, gpio_name))
83 if (dm_gpio_get_value(&gpio))
84 octo_phy_mask |= (1 << (k * 2));
86 /* If CAT == 0, there's no second octo phy -> skip */
89 snprintf(gpio_name, 64, "second-octo-gpio-%u", k);
91 if (request_gpio_by_name(&gpio, dev_name[k], 0x27, gpio_name)) {
92 /* default: second octo phy is present */
93 octo_phy_mask |= (1 << (k * 2 + 1));
97 if (dm_gpio_get_value(&gpio) == 0)
98 octo_phy_mask |= (1 << (k * 2 + 1));
101 return octo_phy_mask;
104 int register_miiphy_bus(uint k, struct mii_dev **bus)
107 struct mii_dev *mdiodev = mdio_alloc();
108 char *name = bb_miiphy_buses[k].name;
112 strncpy(mdiodev->name,
115 mdiodev->read = bb_miiphy_read;
116 mdiodev->write = bb_miiphy_write;
118 retval = mdio_register(mdiodev);
121 *bus = miiphy_get_dev_by_name(name);
126 struct porttype *get_porttype(uint octo_phy_mask, uint k)
128 uint octo_index = k * 4;
131 if (octo_phy_mask & 0x01)
132 return &porttypes[PORTTYPE_MAIN_CAT];
133 else if (!(octo_phy_mask & 0x03))
134 return &porttypes[PORTTYPE_16C_16F];
136 if (octo_phy_mask & (1 << octo_index))
137 return &porttypes[PORTTYPE_TOP_CAT];
143 int init_single_phy(struct porttype *porttype, struct mii_dev *bus,
144 uint bus_idx, uint m, uint phy_idx)
146 struct phy_device *phydev = phy_find_by_mask(
147 bus, 1 << (m * 8 + phy_idx),
148 PHY_INTERFACE_MODE_MII);
150 printf(" %u", bus_idx * 32 + m * 8 + phy_idx);
155 ihs_phy_config(phydev, porttype->phy_invert_in_pol,
156 porttype->phy_invert_out_pol);
161 int init_octo_phys(uint octo_phy_mask)
165 /* there are up to four octo-phys on each mdio bus */
166 for (bus_idx = 0; bus_idx < bb_miiphy_buses_num; ++bus_idx) {
168 uint octo_index = bus_idx * 4;
169 struct mii_dev *bus = NULL;
170 struct porttype *porttype = NULL;
173 porttype = get_porttype(octo_phy_mask, bus_idx);
178 for (m = 0; m < 4; ++m) {
182 * Register a bus device if there is at least one phy
185 if (!m && octo_phy_mask & (0xf << octo_index)) {
186 ret = register_miiphy_bus(bus_idx, &bus);
191 if (!(octo_phy_mask & BIT(octo_index + m)))
194 for (phy_idx = 0; phy_idx < 8; ++phy_idx)
195 init_single_phy(porttype, bus, bus_idx, m,
204 * MII GPIO bitbang implementation
213 struct gpio_desc mdc_gpio;
214 struct gpio_desc mdio_gpio;
219 { 0, {}, {}, 13, 14, 1 },
220 { 1, {}, {}, 25, 45, 1 },
221 { 2, {}, {}, 46, 24, 1 },
224 static int mii_mdio_init(struct bb_miiphy_bus *bus)
226 struct gpio_mii *gpio_mii = bus->priv;
228 struct udevice *gpio_dev1 = NULL;
229 struct udevice *gpio_dev2 = NULL;
231 if (uclass_get_device_by_name(UCLASS_GPIO, "gpio@18100", &gpio_dev1) ||
232 uclass_get_device_by_name(UCLASS_GPIO, "gpio@18140", &gpio_dev2)) {
233 printf("Could not get GPIO device.\n");
237 if (gpio_mii->mdc_num > 31) {
238 gpio_mii->mdc_gpio.dev = gpio_dev2;
239 gpio_mii->mdc_gpio.offset = gpio_mii->mdc_num - 32;
241 gpio_mii->mdc_gpio.dev = gpio_dev1;
242 gpio_mii->mdc_gpio.offset = gpio_mii->mdc_num;
244 gpio_mii->mdc_gpio.flags = 0;
245 snprintf(name, 32, "bb_miiphy_bus-%d-mdc", gpio_mii->index);
246 dm_gpio_request(&gpio_mii->mdc_gpio, name);
248 if (gpio_mii->mdio_num > 31) {
249 gpio_mii->mdio_gpio.dev = gpio_dev2;
250 gpio_mii->mdio_gpio.offset = gpio_mii->mdio_num - 32;
252 gpio_mii->mdio_gpio.dev = gpio_dev1;
253 gpio_mii->mdio_gpio.offset = gpio_mii->mdio_num;
255 gpio_mii->mdio_gpio.flags = 0;
256 snprintf(name, 32, "bb_miiphy_bus-%d-mdio", gpio_mii->index);
257 dm_gpio_request(&gpio_mii->mdio_gpio, name);
259 dm_gpio_set_dir_flags(&gpio_mii->mdc_gpio, GPIOD_IS_OUT);
260 dm_gpio_set_value(&gpio_mii->mdc_gpio, 1);
265 static int mii_mdio_active(struct bb_miiphy_bus *bus)
267 struct gpio_mii *gpio_mii = bus->priv;
269 dm_gpio_set_value(&gpio_mii->mdc_gpio, gpio_mii->mdio_value);
274 static int mii_mdio_tristate(struct bb_miiphy_bus *bus)
276 struct gpio_mii *gpio_mii = bus->priv;
278 dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN);
283 static int mii_set_mdio(struct bb_miiphy_bus *bus, int v)
285 struct gpio_mii *gpio_mii = bus->priv;
287 dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_OUT);
288 dm_gpio_set_value(&gpio_mii->mdio_gpio, v);
289 gpio_mii->mdio_value = v;
294 static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v)
296 struct gpio_mii *gpio_mii = bus->priv;
298 dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN);
299 *v = (dm_gpio_get_value(&gpio_mii->mdio_gpio));
304 static int mii_set_mdc(struct bb_miiphy_bus *bus, int v)
306 struct gpio_mii *gpio_mii = bus->priv;
308 dm_gpio_set_value(&gpio_mii->mdc_gpio, v);
313 static int mii_delay(struct bb_miiphy_bus *bus)
320 struct bb_miiphy_bus bb_miiphy_buses[] = {
323 .init = mii_mdio_init,
324 .mdio_active = mii_mdio_active,
325 .mdio_tristate = mii_mdio_tristate,
326 .set_mdio = mii_set_mdio,
327 .get_mdio = mii_get_mdio,
328 .set_mdc = mii_set_mdc,
330 .priv = &gpio_mii_set[0],
334 .init = mii_mdio_init,
335 .mdio_active = mii_mdio_active,
336 .mdio_tristate = mii_mdio_tristate,
337 .set_mdio = mii_set_mdio,
338 .get_mdio = mii_get_mdio,
339 .set_mdc = mii_set_mdc,
341 .priv = &gpio_mii_set[1],
345 .init = mii_mdio_init,
346 .mdio_active = mii_mdio_active,
347 .mdio_tristate = mii_mdio_tristate,
348 .set_mdio = mii_set_mdio,
349 .get_mdio = mii_get_mdio,
350 .set_mdc = mii_set_mdc,
352 .priv = &gpio_mii_set[2],
356 int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses);