1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013 Gateworks Corporation
5 * Author: Tim Harvey <tharvey@gateworks.com>
11 #include <linux/errno.h>
14 #include <linux/ctype.h>
16 #include "ventana_eeprom.h"
20 * The Gateworks System Controller will fail to ACK a master transaction if
21 * it is busy, which can occur during its 1HZ timer tick while reading ADC's.
22 * When this does occur, it will never be busy long enough to fail more than
23 * 2 back-to-back transfers. Thus we wrap i2c_read and i2c_write with
26 int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
33 ret = i2c_read(chip, addr, alen, buf, len);
36 debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
45 int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
52 ret = i2c_write(chip, addr, alen, buf, len);
55 debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
65 static void read_hwmon(const char *name, uint reg, uint size)
70 printf("%-8s:", name);
71 memset(buf, 0, sizeof(buf));
72 if (gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, size)) {
75 ui = buf[0] | (buf[1]<<8) | (buf[2]<<16);
76 if (size == 2 && ui > 0x8000)
85 int gsc_info(int verbose)
87 unsigned char buf[16];
90 if (gsc_i2c_read(GSC_SC_ADDR, 0, 1, buf, 16))
91 return CMD_RET_FAILURE;
93 printf("GSC: v%d", buf[GSC_SC_FWVER]);
94 printf(" 0x%04x", buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC+1]<<8);
95 printf(" WDT:%sabled", (buf[GSC_SC_CTRL1] & (1<<GSC_SC_CTRL1_WDEN))
97 if (buf[GSC_SC_STATUS] & (1 << GSC_SC_IRQ_WATCHDOG)) {
98 buf[GSC_SC_STATUS] &= ~(1 << GSC_SC_IRQ_WATCHDOG);
100 gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1,
101 &buf[GSC_SC_STATUS], 1);
103 if (!gsc_i2c_read(GSC_HWMON_ADDR, GSC_HWMON_TEMP, 1, buf, 2)) {
104 int ui = buf[0] | buf[1]<<8;
107 printf(" board temp at %dC", ui / 10);
111 return CMD_RET_SUCCESS;
113 read_hwmon("Temp", GSC_HWMON_TEMP, 2);
114 read_hwmon("VIN", GSC_HWMON_VIN, 3);
115 read_hwmon("VBATT", GSC_HWMON_VBATT, 3);
116 read_hwmon("VDD_3P3", GSC_HWMON_VDD_3P3, 3);
117 read_hwmon("VDD_ARM", GSC_HWMON_VDD_CORE, 3);
118 read_hwmon("VDD_SOC", GSC_HWMON_VDD_SOC, 3);
119 read_hwmon("VDD_HIGH", GSC_HWMON_VDD_HIGH, 3);
120 read_hwmon("VDD_DDR", GSC_HWMON_VDD_DDR, 3);
121 read_hwmon("VDD_5P0", GSC_HWMON_VDD_5P0, 3);
122 if (strncasecmp((const char*) ventana_info.model, "GW553", 5))
123 read_hwmon("VDD_2P5", GSC_HWMON_VDD_2P5, 3);
124 read_hwmon("VDD_1P8", GSC_HWMON_VDD_1P8, 3);
125 read_hwmon("VDD_IO2", GSC_HWMON_VDD_IO2, 3);
126 switch (ventana_info.model[3]) {
127 case '1': /* GW51xx */
128 read_hwmon("VDD_IO3", GSC_HWMON_VDD_IO4, 3); /* -C rev */
130 case '2': /* GW52xx */
132 case '3': /* GW53xx */
133 read_hwmon("VDD_IO4", GSC_HWMON_VDD_IO4, 3); /* -C rev */
134 read_hwmon("VDD_GPS", GSC_HWMON_VDD_IO3, 3);
136 case '4': /* GW54xx */
137 read_hwmon("VDD_IO3", GSC_HWMON_VDD_IO4, 3); /* -C rev */
138 read_hwmon("VDD_GPS", GSC_HWMON_VDD_IO3, 3);
140 case '5': /* GW55xx */
142 case '6': /* GW560x */
143 read_hwmon("VDD_IO4", GSC_HWMON_VDD_IO4, 3);
144 read_hwmon("VDD_GPS", GSC_HWMON_VDD_IO3, 3);
146 case '9': /* GW590x */
147 read_hwmon("AMONBMON", GSC_HWMON_VDD_IO3, 3);
148 read_hwmon("BAT_VOLT", GSC_HWMON_VDD_EXT, 3);
149 read_hwmon("BAT_TEMP", GSC_HWMON_VDD_IO4, 2);
155 * The Gateworks System Controller implements a boot
156 * watchdog (always enabled) as a workaround for IMX6 boot related
158 * ERR005768 - no fix scheduled
159 * ERR006282 - fixed in silicon r1.2
160 * ERR007117 - fixed in silicon r1.3
161 * ERR007220 - fixed in silicon r1.3
162 * ERR007926 - no fix scheduled
163 * see http://cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf
165 * Disable the boot watchdog
167 int gsc_boot_wd_disable(void)
171 i2c_set_bus_num(CONFIG_I2C_GSC);
172 if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) {
173 reg |= (1 << GSC_SC_CTRL1_WDDIS);
174 if (!gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
177 puts("Error: could not disable GSC Watchdog\n");
181 #if defined(CONFIG_CMD_GSC) && !defined(CONFIG_SPL_BUILD)
182 static int do_gsc_sleep(struct cmd_tbl *cmdtp, int flag, int argc,
186 unsigned long secs = 0;
189 return CMD_RET_USAGE;
191 secs = simple_strtoul(argv[1], NULL, 10);
192 printf("GSC Sleeping for %ld seconds\n", secs);
195 reg = (secs >> 24) & 0xff;
196 if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, ®, 1))
198 reg = (secs >> 16) & 0xff;
199 if (gsc_i2c_write(GSC_SC_ADDR, 8, 1, ®, 1))
201 reg = (secs >> 8) & 0xff;
202 if (gsc_i2c_write(GSC_SC_ADDR, 7, 1, ®, 1))
205 if (gsc_i2c_write(GSC_SC_ADDR, 6, 1, ®, 1))
207 if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
210 if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
214 if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
217 return CMD_RET_SUCCESS;
220 printf("i2c error\n");
221 return CMD_RET_FAILURE;
224 static int do_gsc_wd(struct cmd_tbl *cmdtp, int flag, int argc,
230 return CMD_RET_USAGE;
232 if (strcasecmp(argv[1], "enable") == 0) {
236 timeout = simple_strtoul(argv[2], NULL, 10);
238 if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
239 return CMD_RET_FAILURE;
240 reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
242 reg |= (1 << GSC_SC_CTRL1_WDTIME);
245 reg |= (1 << GSC_SC_CTRL1_WDEN);
246 if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
247 return CMD_RET_FAILURE;
248 printf("GSC Watchdog enabled with timeout=%d seconds\n",
250 } else if (strcasecmp(argv[1], "disable") == 0) {
252 if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
253 return CMD_RET_FAILURE;
254 reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
255 if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
256 return CMD_RET_FAILURE;
257 printf("GSC Watchdog disabled\n");
259 return CMD_RET_USAGE;
261 return CMD_RET_SUCCESS;
264 static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
269 if (strcasecmp(argv[1], "wd") == 0)
270 return do_gsc_wd(cmdtp, flag, --argc, ++argv);
271 else if (strcasecmp(argv[1], "sleep") == 0)
272 return do_gsc_sleep(cmdtp, flag, --argc, ++argv);
274 return CMD_RET_USAGE;
278 gsc, 4, 1, do_gsc, "GSC configuration",
279 "[wd enable [30|60]]|[wd disable]|[sleep <secs>]\n"
282 #endif /* CONFIG_CMD_GSC */