board/freescale/imx8qm_mek/imx8qm_mek.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2018 NXP
   4  */
   5
   6 #include <common.h>
   7 #include <errno.h>
   8 #include <linux/libfdt.h>
   9 #include <environment.h>
  10 #include <asm/io.h>
  11 #include <asm/gpio.h>
  12 #include <asm/arch/clock.h>
  13 #include <asm/arch/sci/sci.h>
  14 #include <asm/arch/imx8-pins.h>
  15 #include <asm/arch/iomux.h>
  16 #include <asm/arch/sys_proto.h>
  17
  18 DECLARE_GLOBAL_DATA_PTR;
  19
  20 #define UART_PAD_CTRL   ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
  21                          (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
  22                          (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
  23                          (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
  24
  25 static iomux_cfg_t uart0_pads[] = {
  26         SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  27         SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  28 };
  29
  30 static void setup_iomux_uart(void)
  31 {
  32         imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
  33 }
  34
  35 int board_early_init_f(void)
  36 {
  37         sc_pm_clock_rate_t rate = SC_80MHZ;
  38         int ret;
  39
  40         /* Set UART0 clock root to 80 MHz */
  41         ret = sc_pm_setup_uart(SC_R_UART_0, rate);
  42         if (ret)
  43                 return ret;
  44
  45         setup_iomux_uart();
  46
  47         sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
  48
  49         return 0;
  50 }
  51
  52 #if IS_ENABLED(CONFIG_DM_GPIO)
  53 static void board_gpio_init(void)
  54 {
  55         /* TODO */
  56 }
  57 #else
  58 static inline void board_gpio_init(void) {}
  59 #endif
  60
  61 #if IS_ENABLED(CONFIG_FEC_MXC)
  62 #include <miiphy.h>
  63
  64 int board_phy_config(struct phy_device *phydev)
  65 {
  66         phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
  67         phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
  68
  69         phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
  70         phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
  71         phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
  72         phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
  73
  74         if (phydev->drv->config)
  75                 phydev->drv->config(phydev);
  76
  77         return 0;
  78 }
  79 #endif
  80
  81 void build_info(void)
  82 {
  83         u32 sc_build = 0, sc_commit = 0;
  84
  85         /* Get SCFW build and commit id */
  86         sc_misc_build_info(-1, &sc_build, &sc_commit);
  87         if (!sc_build) {
  88                 printf("SCFW does not support build info\n");
  89                 sc_commit = 0; /* Display 0 when the build info is not supported*/
  90         }
  91         printf("Build: SCFW %x\n", sc_commit);
  92 }
  93
  94 int checkboard(void)
  95 {
  96         puts("Board: iMX8QM MEK\n");
  97
  98         build_info();
  99         print_bootinfo();
 100
 101         return 0;
 102 }
 103
 104 int board_init(void)
 105 {
 106         /* Power up base board */
 107         sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
 108
 109         board_gpio_init();
 110
 111         return 0;
 112 }
 113
 114 void detail_board_ddr_info(void)
 115 {
 116         puts("\nDDR    ");
 117 }
 118
 119 /*
 120  * Board specific reset that is system reset.
 121  */
 122 void reset_cpu(ulong addr)
 123 {
 124         /* TODO */
 125 }
 126
 127 #ifdef CONFIG_OF_BOARD_SETUP
 128 int ft_board_setup(void *blob, bd_t *bd)
 129 {
 130         return 0;
 131 }
 132 #endif
 133
 134 int board_mmc_get_env_dev(int devno)
 135 {
 136         return devno;
 137 }
 138
 139 int board_late_init(void)
 140 {
 141 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 142         env_set("board_name", "MEK");
 143         env_set("board_rev", "iMX8QM");
 144 #endif
 145
 146         return 0;
 147 }