board/firefly/firefly-rk3308/roc_cc_rk3308.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include <common.h>
   7 #include <adc.h>
   8 #include <asm/io.h>
   9 #include <asm/arch/grf_rk3308.h>
  10 #include <asm/arch-rockchip/hardware.h>
  11
  12 #if defined(CONFIG_DEBUG_UART)
  13 #define GRF_BASE        0xff000000
  14
  15 enum {
  16         GPIO1C7_SHIFT           = 8,
  17         GPIO1C7_MASK            = GENMASK(11, 8),
  18         GPIO1C7_GPIO            = 0,
  19         GPIO1C7_UART1_RTSN,
  20         GPIO1C7_UART2_TX_M0,
  21         GPIO1C7_SPI2_MOSI,
  22         GPIO1C7_JTAG_TMS,
  23
  24         GPIO1C6_SHIFT           = 4,
  25         GPIO1C6_MASK            = GENMASK(7, 4),
  26         GPIO1C6_GPIO            = 0,
  27         GPIO1C6_UART1_CTSN,
  28         GPIO1C6_UART2_RX_M0,
  29         GPIO1C6_SPI2_MISO,
  30         GPIO1C6_JTAG_TCLK,
  31
  32         GPIO4D3_SHIFT           = 6,
  33         GPIO4D3_MASK            = GENMASK(7, 6),
  34         GPIO4D3_GPIO            = 0,
  35         GPIO4D3_SDMMC_D3,
  36         GPIO4D3_UART2_TX_M1,
  37
  38         GPIO4D2_SHIFT           = 4,
  39         GPIO4D2_MASK            = GENMASK(5, 4),
  40         GPIO4D2_GPIO            = 0,
  41         GPIO4D2_SDMMC_D2,
  42         GPIO4D2_UART2_RX_M1,
  43
  44         UART2_IO_SEL_SHIFT      = 2,
  45         UART2_IO_SEL_MASK       = GENMASK(3, 2),
  46         UART2_IO_SEL_M0         = 0,
  47         UART2_IO_SEL_M1,
  48         UART2_IO_SEL_USB,
  49 };
  50
  51 void board_debug_uart_init(void)
  52 {
  53         static struct rk3308_grf * const grf = (void *)GRF_BASE;
  54
  55         /* Enable early UART2 channel m0 on the rk3308 */
  56         rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
  57                      UART2_IO_SEL_M0 << UART2_IO_SEL_SHIFT);
  58         rk_clrsetreg(&grf->gpio1ch_iomux,
  59                      GPIO1C6_MASK | GPIO1C7_MASK,
  60                      GPIO1C6_UART2_RX_M0 << GPIO1C6_SHIFT |
  61                      GPIO1C7_UART2_TX_M0 << GPIO1C7_SHIFT);
  62 }
  63 #endif
  64
  65 #define KEY_DOWN_MIN_VAL        0
  66 #define KEY_DOWN_MAX_VAL        30
  67
  68 int rockchip_dnl_key_pressed(void)
  69 {
  70         unsigned int val;
  71
  72         if (adc_channel_single_shot("saradc", 1, &val)) {
  73                 printf("%s read adc key val failed\n", __func__);
  74                 return false;
  75         }
  76
  77         if (val >= KEY_DOWN_MIN_VAL && val <= KEY_DOWN_MAX_VAL)
  78                 return true;
  79         else
  80                 return false;
  81 }