1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Based on da830evm.c. Original Copyrights follow:
7 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
8 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
13 #include <environment.h>
18 #include <spi_flash.h>
19 #include <asm/arch/hardware.h>
20 #include <asm/ti-common/davinci_nand.h>
21 #include <asm/arch/emac_defs.h>
22 #include <asm/arch/pinmux_defs.h>
24 #include <asm/arch/davinci_misc.h>
25 #include <linux/errno.h>
27 #include <asm/mach-types.h>
30 #ifdef CONFIG_MMC_DAVINCI
32 #include <asm/arch/sdmmc_defs.h>
35 DECLARE_GLOBAL_DATA_PTR;
37 #ifdef CONFIG_DRIVER_TI_EMAC
38 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
43 #endif /* CONFIG_DRIVER_TI_EMAC */
45 #define CFG_MAC_ADDR_SPI_BUS 0
46 #define CFG_MAC_ADDR_SPI_CS 0
47 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
48 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
50 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
52 #ifdef CONFIG_SPL_BUILD
54 #include <dm/platform_data/spi_davinci.h>
56 static const struct ns16550_platdata da850evm_serial = {
57 .base = DAVINCI_UART2_BASE,
60 .fcr = UART_FCR_DEFVAL,
63 U_BOOT_DEVICE(da850evm_uart) = {
64 .name = "ns16550_serial",
65 .platdata = &da850evm_serial,
68 static const struct davinci_spi_platdata davinci_spi_data = {
69 .regs = (struct davinci_spi_regs *)0x01f0e000,
73 U_BOOT_DEVICE(davinci_spi) = {
74 .name = "davinci_spi",
75 .platdata = &davinci_spi_data,
79 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
80 static int get_mac_addr(u8 *addr)
82 struct spi_flash *flash;
85 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
86 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
88 printf("Error - unable to probe SPI flash.\n");
92 ret = spi_flash_read(flash, (CFG_MAC_ADDR_OFFSET) + 1, 7, addr);
94 printf("Error - unable to read MAC address from SPI flash.\n");
102 void dsp_lpsc_on(unsigned domain, unsigned int id)
104 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
105 struct davinci_psc_regs *psc_regs;
107 psc_regs = davinci_psc0_regs;
108 mdstat = &psc_regs->psc0.mdstat[id];
109 mdctl = &psc_regs->psc0.mdctl[id];
110 ptstat = &psc_regs->ptstat;
111 ptcmd = &psc_regs->ptcmd;
113 while (*ptstat & (0x1 << domain))
116 if ((*mdstat & 0x1f) == 0x03)
117 return; /* Already on and enabled */
121 *ptcmd = 0x1 << domain;
123 while (*ptstat & (0x1 << domain))
125 while ((*mdstat & 0x1f) != 0x03)
126 ; /* Probably an overkill... */
129 static void dspwake(void)
131 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
134 /* if the device is ARM only, return */
135 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
138 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
141 *resetvect++ = 0x1E000; /* DSP Idle */
142 /* clear out the next 10 words as NOP */
143 memset(resetvect, 0, sizeof(unsigned) *10);
145 /* setup the DSP reset vector */
146 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
148 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
149 val = readl(PSC0_MDCTL + (15 * 4));
151 writel(val, (PSC0_MDCTL + (15 * 4)));
154 int misc_init_r(void)
158 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
160 uchar env_enetaddr[6];
163 enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr);
167 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
171 spi_mac_read = get_mac_addr(buff);
175 * MAC address not present in the environment
176 * try and read the MAC address from SPI flash
179 if (!enetaddr_found) {
181 if (is_valid_ethaddr(buff)) {
182 if (eth_env_set_enetaddr("ethaddr", buff)) {
183 printf("Warning: Failed to "
184 "set MAC address from SPI flash\n");
187 printf("Warning: Invalid "
188 "MAC address read from SPI flash\n");
193 * MAC address present in environment compare it with
194 * the MAC address in SPI flash and warn on mismatch
196 if (!spi_mac_read && is_valid_ethaddr(buff) &&
197 memcmp(env_enetaddr, buff, 6))
198 printf("Warning: MAC address in SPI flash don't match "
199 "with the MAC address in the environment\n");
200 printf("Default using MAC address from environment\n");
203 #elif defined(CONFIG_MAC_ADDR_IN_EEPROM)
207 /* Read Ethernet MAC address from EEPROM */
208 eeprom_mac_read = dvevm_read_mac_address(enetaddr);
211 * MAC address not present in the environment
212 * try and read the MAC address from EEPROM flash
215 if (!enetaddr_found) {
217 /* Set Ethernet MAC address from EEPROM */
218 davinci_sync_env_enetaddr(enetaddr);
221 * MAC address present in environment compare it with
222 * the MAC address in EEPROM and warn on mismatch
224 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
225 printf("Warning: MAC address in EEPROM don't match "
226 "with the MAC address in the environment\n");
227 printf("Default using MAC address from environment\n");
234 #ifndef CONFIG_DM_MMC
235 #ifdef CONFIG_MMC_DAVINCI
236 static struct davinci_mmc mmc_sd0 = {
237 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
238 .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
239 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
240 .version = MMC_CTLR_VERSION_2,
243 int board_mmc_init(bd_t *bis)
245 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
247 /* Add slot-0 to mmc subsystem */
248 return davinci_mmc_init(bis, &mmc_sd0);
253 static const struct pinmux_config gpio_pins[] = {
254 #ifdef CONFIG_USE_NOR
255 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
256 { pinmux(0), 8, 4 }, /* GP0[11] */
258 #ifdef CONFIG_MMC_DAVINCI
259 /* GP0[11] is required for SD to work on Rev 3 EVMs */
260 { pinmux(0), 8, 4 }, /* GP0[11] */
264 const struct pinmux_resource pinmuxes[] = {
265 #ifdef CONFIG_DRIVER_TI_EMAC
266 PINMUX_ITEM(emac_pins_mdio),
267 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
268 PINMUX_ITEM(emac_pins_rmii),
270 PINMUX_ITEM(emac_pins_mii),
273 #ifdef CONFIG_SPI_FLASH
274 PINMUX_ITEM(spi1_pins_base),
275 PINMUX_ITEM(spi1_pins_scs0),
277 PINMUX_ITEM(uart2_pins_txrx),
278 PINMUX_ITEM(uart2_pins_rtscts),
279 PINMUX_ITEM(i2c0_pins),
280 #ifdef CONFIG_NAND_DAVINCI
281 PINMUX_ITEM(emifa_pins_cs3),
282 PINMUX_ITEM(emifa_pins_cs4),
283 PINMUX_ITEM(emifa_pins_nand),
284 #elif defined(CONFIG_USE_NOR)
285 PINMUX_ITEM(emifa_pins_cs2),
286 PINMUX_ITEM(emifa_pins_nor),
288 PINMUX_ITEM(gpio_pins),
289 #ifdef CONFIG_MMC_DAVINCI
290 PINMUX_ITEM(mmc0_pins),
294 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
296 const struct lpsc_resource lpsc[] = {
297 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
298 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
299 { DAVINCI_LPSC_EMAC }, /* image download */
300 { DAVINCI_LPSC_UART2 }, /* console */
301 { DAVINCI_LPSC_GPIO },
302 #ifdef CONFIG_MMC_DAVINCI
303 { DAVINCI_LPSC_MMC_SD },
307 const int lpsc_size = ARRAY_SIZE(lpsc);
309 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
310 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
313 #define REV_AM18X_EVM 0x100
316 * get_board_rev() - setup to pass kernel board revision information
318 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
324 u32 get_board_rev(void)
327 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
330 s = env_get("maxcpuclk");
332 maxcpuclk = simple_strtoul(s, NULL, 10);
334 if (maxcpuclk >= 456000000)
336 else if (maxcpuclk >= 408000000)
338 else if (maxcpuclk >= 372000000)
340 #ifdef CONFIG_DA850_AM18X_EVM
341 rev |= REV_AM18X_EVM;
346 int board_early_init_f(void)
349 * Power on required peripherals
350 * ARM does not have access by default to PSC0 and PSC1
351 * assuming here that the DSP bootloader has set the IOPU
352 * such that PSC access is available to ARM
354 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
364 #ifdef CONFIG_NAND_DAVINCI
366 * NAND CS setup - cycle counts based on da850evm NAND timings in the
367 * Linux kernel @ 25MHz EMIFA
369 writel((DAVINCI_ABCR_WSETUP(2) |
370 DAVINCI_ABCR_WSTROBE(2) |
371 DAVINCI_ABCR_WHOLD(1) |
372 DAVINCI_ABCR_RSETUP(1) |
373 DAVINCI_ABCR_RSTROBE(4) |
374 DAVINCI_ABCR_RHOLD(0) |
376 DAVINCI_ABCR_ASIZE_8BIT),
377 &davinci_emif_regs->ab2cr); /* CS3 */
380 /* arch number of the board */
381 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
383 /* address of boot parameters */
384 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
386 /* setup the SUSPSRC for ARM to control emulation suspend */
387 writel(readl(&davinci_syscfg_regs->suspsrc) &
388 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
389 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
390 DAVINCI_SYSCFG_SUSPSRC_UART2),
391 &davinci_syscfg_regs->suspsrc);
393 /* configure pinmux settings */
394 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
397 #ifdef CONFIG_USE_NOR
398 /* Set the GPIO direction as output */
399 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
401 /* Set the output as low */
402 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
405 #ifdef CONFIG_MMC_DAVINCI
406 /* Set the GPIO direction as output */
407 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
409 /* Set the output as high */
410 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR);
413 #ifdef CONFIG_DRIVER_TI_EMAC
414 davinci_emac_mii_mode_sel(HAS_RMII);
415 #endif /* CONFIG_DRIVER_TI_EMAC */
417 /* enable the console UART */
418 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
419 DAVINCI_UART_PWREMU_MGMT_UTRST),
420 &davinci_uart2_ctrl_regs->pwremu_mgmt);
425 #ifdef CONFIG_DRIVER_TI_EMAC
427 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
431 * DA850/OMAP-L138 EVM can interface to a daughter card for
432 * additional features. This card has an I2C GPIO Expander TCA6416
433 * to select the required functions like camera, RMII Ethernet,
434 * character LCD, video.
436 * Initialization of the expander involves configuring the
437 * polarity and direction of the ports. P07-P05 are used here.
438 * These ports are connected to a Mux chip which enables only one
439 * functionality at a time.
441 * For RMII phy to respond, the MII MDIO clock has to be disabled
442 * since both the PHY devices have address as zero. The MII MDIO
443 * clock is controlled via GPIO2[6].
445 * This code is valid for Beta version of the hardware
447 int rmii_hw_init(void)
449 const struct pinmux_config gpio_pins[] = {
456 /* PinMux for GPIO */
457 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
460 /* I2C Exapnder configuration */
461 /* Set polarity to non-inverted */
464 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
466 printf("\nExpander @ 0x%02x write FAILED!!!\n",
467 CONFIG_SYS_I2C_EXPANDER_ADDR);
471 /* Configure P07-P05 as outputs */
474 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
476 printf("\nExpander @ 0x%02x write FAILED!!!\n",
477 CONFIG_SYS_I2C_EXPANDER_ADDR);
480 /* For Ethernet RMII selection
485 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
486 printf("\nExpander @ 0x%02x read FAILED!!!\n",
487 CONFIG_SYS_I2C_EXPANDER_ADDR);
491 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
492 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
493 printf("\nExpander @ 0x%02x write FAILED!!!\n",
494 CONFIG_SYS_I2C_EXPANDER_ADDR);
497 /* Set the output as high */
498 temp = REG(GPIO_BANK2_REG_SET_ADDR);
500 REG(GPIO_BANK2_REG_SET_ADDR) = temp;
502 /* Set the GPIO direction as output */
503 temp = REG(GPIO_BANK2_REG_DIR_ADDR);
504 temp &= ~(0x01 << 6);
505 REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
509 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
512 * Initializes on-board ethernet controllers.
514 int board_eth_init(bd_t *bis)
516 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
517 /* Select RMII fucntion through the expander */
519 printf("RMII hardware init failed!!!\n");
521 if (!davinci_emac_initialize()) {
522 printf("Error: Ethernet init failed!\n");
528 #endif /* CONFIG_DRIVER_TI_EMAC */