2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 * Based on da830evm.c. Original Copyrights follow:
6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
9 * SPDX-License-Identifier: GPL-2.0+
13 #include <environment.h>
18 #include <spi_flash.h>
19 #include <asm/arch/hardware.h>
20 #include <asm/ti-common/davinci_nand.h>
21 #include <asm/arch/emac_defs.h>
22 #include <asm/arch/pinmux_defs.h>
24 #include <asm/arch/davinci_misc.h>
25 #include <linux/errno.h>
27 #include <asm/mach-types.h>
29 #ifdef CONFIG_MMC_DAVINCI
31 #include <asm/arch/sdmmc_defs.h>
34 DECLARE_GLOBAL_DATA_PTR;
36 #ifdef CONFIG_DRIVER_TI_EMAC
37 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
42 #endif /* CONFIG_DRIVER_TI_EMAC */
44 #define CFG_MAC_ADDR_SPI_BUS 0
45 #define CFG_MAC_ADDR_SPI_CS 0
46 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
47 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
49 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
51 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
52 static int get_mac_addr(u8 *addr)
54 struct spi_flash *flash;
57 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
58 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
60 printf("Error - unable to probe SPI flash.\n");
64 ret = spi_flash_read(flash, (CFG_MAC_ADDR_OFFSET) + 1, 7, addr);
66 printf("Error - unable to read MAC address from SPI flash.\n");
74 void dsp_lpsc_on(unsigned domain, unsigned int id)
76 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
77 struct davinci_psc_regs *psc_regs;
79 psc_regs = davinci_psc0_regs;
80 mdstat = &psc_regs->psc0.mdstat[id];
81 mdctl = &psc_regs->psc0.mdctl[id];
82 ptstat = &psc_regs->ptstat;
83 ptcmd = &psc_regs->ptcmd;
85 while (*ptstat & (0x1 << domain))
88 if ((*mdstat & 0x1f) == 0x03)
89 return; /* Already on and enabled */
93 *ptcmd = 0x1 << domain;
95 while (*ptstat & (0x1 << domain))
97 while ((*mdstat & 0x1f) != 0x03)
98 ; /* Probably an overkill... */
101 static void dspwake(void)
103 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
106 /* if the device is ARM only, return */
107 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
110 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
113 *resetvect++ = 0x1E000; /* DSP Idle */
114 /* clear out the next 10 words as NOP */
115 memset(resetvect, 0, sizeof(unsigned) *10);
117 /* setup the DSP reset vector */
118 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
120 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
121 val = readl(PSC0_MDCTL + (15 * 4));
123 writel(val, (PSC0_MDCTL + (15 * 4)));
126 int misc_init_r(void)
130 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
132 uchar env_enetaddr[6];
135 enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr);
139 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
143 spi_mac_read = get_mac_addr(buff);
147 * MAC address not present in the environment
148 * try and read the MAC address from SPI flash
151 if (!enetaddr_found) {
153 if (is_valid_ethaddr(buff)) {
154 if (eth_env_set_enetaddr("ethaddr", buff)) {
155 printf("Warning: Failed to "
156 "set MAC address from SPI flash\n");
159 printf("Warning: Invalid "
160 "MAC address read from SPI flash\n");
165 * MAC address present in environment compare it with
166 * the MAC address in SPI flash and warn on mismatch
168 if (!spi_mac_read && is_valid_ethaddr(buff) &&
169 memcmp(env_enetaddr, buff, 6))
170 printf("Warning: MAC address in SPI flash don't match "
171 "with the MAC address in the environment\n");
172 printf("Default using MAC address from environment\n");
175 #elif defined(CONFIG_MAC_ADDR_IN_EEPROM)
179 /* Read Ethernet MAC address from EEPROM */
180 eeprom_mac_read = dvevm_read_mac_address(enetaddr);
183 * MAC address not present in the environment
184 * try and read the MAC address from EEPROM flash
187 if (!enetaddr_found) {
189 /* Set Ethernet MAC address from EEPROM */
190 davinci_sync_env_enetaddr(enetaddr);
193 * MAC address present in environment compare it with
194 * the MAC address in EEPROM and warn on mismatch
196 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
197 printf("Warning: MAC address in EEPROM don't match "
198 "with the MAC address in the environment\n");
199 printf("Default using MAC address from environment\n");
206 #ifdef CONFIG_MMC_DAVINCI
207 static struct davinci_mmc mmc_sd0 = {
208 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
209 .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
210 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
211 .version = MMC_CTLR_VERSION_2,
214 int board_mmc_init(bd_t *bis)
216 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
218 /* Add slot-0 to mmc subsystem */
219 return davinci_mmc_init(bis, &mmc_sd0);
223 static const struct pinmux_config gpio_pins[] = {
224 #ifdef CONFIG_USE_NOR
225 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
226 { pinmux(0), 8, 4 }, /* GP0[11] */
228 #ifdef CONFIG_MMC_DAVINCI
229 /* GP0[11] is required for SD to work on Rev 3 EVMs */
230 { pinmux(0), 8, 4 }, /* GP0[11] */
234 const struct pinmux_resource pinmuxes[] = {
235 #ifdef CONFIG_DRIVER_TI_EMAC
236 PINMUX_ITEM(emac_pins_mdio),
237 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
238 PINMUX_ITEM(emac_pins_rmii),
240 PINMUX_ITEM(emac_pins_mii),
243 #ifdef CONFIG_SPI_FLASH
244 PINMUX_ITEM(spi1_pins_base),
245 PINMUX_ITEM(spi1_pins_scs0),
247 PINMUX_ITEM(uart2_pins_txrx),
248 PINMUX_ITEM(uart2_pins_rtscts),
249 PINMUX_ITEM(i2c0_pins),
250 #ifdef CONFIG_NAND_DAVINCI
251 PINMUX_ITEM(emifa_pins_cs3),
252 PINMUX_ITEM(emifa_pins_cs4),
253 PINMUX_ITEM(emifa_pins_nand),
254 #elif defined(CONFIG_USE_NOR)
255 PINMUX_ITEM(emifa_pins_cs2),
256 PINMUX_ITEM(emifa_pins_nor),
258 PINMUX_ITEM(gpio_pins),
259 #ifdef CONFIG_MMC_DAVINCI
260 PINMUX_ITEM(mmc0_pins),
264 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
266 const struct lpsc_resource lpsc[] = {
267 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
268 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
269 { DAVINCI_LPSC_EMAC }, /* image download */
270 { DAVINCI_LPSC_UART2 }, /* console */
271 { DAVINCI_LPSC_GPIO },
272 #ifdef CONFIG_MMC_DAVINCI
273 { DAVINCI_LPSC_MMC_SD },
277 const int lpsc_size = ARRAY_SIZE(lpsc);
279 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
280 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
283 #define REV_AM18X_EVM 0x100
286 * get_board_rev() - setup to pass kernel board revision information
288 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
294 u32 get_board_rev(void)
297 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
300 s = env_get("maxcpuclk");
302 maxcpuclk = simple_strtoul(s, NULL, 10);
304 if (maxcpuclk >= 456000000)
306 else if (maxcpuclk >= 408000000)
308 else if (maxcpuclk >= 372000000)
310 #ifdef CONFIG_DA850_AM18X_EVM
311 rev |= REV_AM18X_EVM;
316 int board_early_init_f(void)
319 * Power on required peripherals
320 * ARM does not have access by default to PSC0 and PSC1
321 * assuming here that the DSP bootloader has set the IOPU
322 * such that PSC access is available to ARM
324 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
334 #ifdef CONFIG_NAND_DAVINCI
336 * NAND CS setup - cycle counts based on da850evm NAND timings in the
337 * Linux kernel @ 25MHz EMIFA
339 writel((DAVINCI_ABCR_WSETUP(2) |
340 DAVINCI_ABCR_WSTROBE(2) |
341 DAVINCI_ABCR_WHOLD(1) |
342 DAVINCI_ABCR_RSETUP(1) |
343 DAVINCI_ABCR_RSTROBE(4) |
344 DAVINCI_ABCR_RHOLD(0) |
346 DAVINCI_ABCR_ASIZE_8BIT),
347 &davinci_emif_regs->ab2cr); /* CS3 */
350 /* arch number of the board */
351 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
353 /* address of boot parameters */
354 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
356 /* setup the SUSPSRC for ARM to control emulation suspend */
357 writel(readl(&davinci_syscfg_regs->suspsrc) &
358 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
359 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
360 DAVINCI_SYSCFG_SUSPSRC_UART2),
361 &davinci_syscfg_regs->suspsrc);
363 /* configure pinmux settings */
364 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
367 #ifdef CONFIG_USE_NOR
368 /* Set the GPIO direction as output */
369 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
371 /* Set the output as low */
372 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
375 #ifdef CONFIG_MMC_DAVINCI
376 /* Set the GPIO direction as output */
377 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
379 /* Set the output as high */
380 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR);
383 #ifdef CONFIG_DRIVER_TI_EMAC
384 davinci_emac_mii_mode_sel(HAS_RMII);
385 #endif /* CONFIG_DRIVER_TI_EMAC */
387 /* enable the console UART */
388 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
389 DAVINCI_UART_PWREMU_MGMT_UTRST),
390 &davinci_uart2_ctrl_regs->pwremu_mgmt);
395 #ifdef CONFIG_DRIVER_TI_EMAC
397 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
401 * DA850/OMAP-L138 EVM can interface to a daughter card for
402 * additional features. This card has an I2C GPIO Expander TCA6416
403 * to select the required functions like camera, RMII Ethernet,
404 * character LCD, video.
406 * Initialization of the expander involves configuring the
407 * polarity and direction of the ports. P07-P05 are used here.
408 * These ports are connected to a Mux chip which enables only one
409 * functionality at a time.
411 * For RMII phy to respond, the MII MDIO clock has to be disabled
412 * since both the PHY devices have address as zero. The MII MDIO
413 * clock is controlled via GPIO2[6].
415 * This code is valid for Beta version of the hardware
417 int rmii_hw_init(void)
419 const struct pinmux_config gpio_pins[] = {
426 /* PinMux for GPIO */
427 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
430 /* I2C Exapnder configuration */
431 /* Set polarity to non-inverted */
434 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
436 printf("\nExpander @ 0x%02x write FAILED!!!\n",
437 CONFIG_SYS_I2C_EXPANDER_ADDR);
441 /* Configure P07-P05 as outputs */
444 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
446 printf("\nExpander @ 0x%02x write FAILED!!!\n",
447 CONFIG_SYS_I2C_EXPANDER_ADDR);
450 /* For Ethernet RMII selection
455 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
456 printf("\nExpander @ 0x%02x read FAILED!!!\n",
457 CONFIG_SYS_I2C_EXPANDER_ADDR);
461 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
462 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
463 printf("\nExpander @ 0x%02x write FAILED!!!\n",
464 CONFIG_SYS_I2C_EXPANDER_ADDR);
467 /* Set the output as high */
468 temp = REG(GPIO_BANK2_REG_SET_ADDR);
470 REG(GPIO_BANK2_REG_SET_ADDR) = temp;
472 /* Set the GPIO direction as output */
473 temp = REG(GPIO_BANK2_REG_DIR_ADDR);
474 temp &= ~(0x01 << 6);
475 REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
479 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
482 * Initializes on-board ethernet controllers.
484 int board_eth_init(bd_t *bis)
486 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
487 /* Select RMII fucntion through the expander */
489 printf("RMII hardware init failed!!!\n");
491 if (!davinci_emac_initialize()) {
492 printf("Error: Ethernet init failed!\n");
498 #endif /* CONFIG_DRIVER_TI_EMAC */