1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
14 #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
15 #define FLASH_BANK_SIZE 0x200000
17 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
19 void flash_print_info(flash_info_t *info)
23 switch (info->flash_id & FLASH_VENDMASK) {
24 case (AMD_MANUFACT & FLASH_VENDMASK):
28 printf ("Unknown Vendor ");
32 switch (info->flash_id & FLASH_TYPEMASK) {
33 case (AMD_ID_PL160CB & FLASH_TYPEMASK):
34 printf ("AM29PL160CB (16Mbit)\n");
37 printf ("Unknown Chip Type\n");
42 printf (" Size: %ld MB in %d Sectors\n",
43 info->size >> 20, info->sector_count);
45 printf (" Sector Start Addresses:");
46 for (i = 0; i < info->sector_count; i++) {
50 printf (" %08lX%s", info->start[i],
51 info->protect[i] ? " (RO)" : " ");
60 unsigned long flash_init(void)
65 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
68 flash_info[i].flash_id =
69 (AMD_MANUFACT & FLASH_VENDMASK) |
70 (AMD_ID_PL160CB & FLASH_TYPEMASK);
71 flash_info[i].size = FLASH_BANK_SIZE;
72 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
73 memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
75 flashbase = PHYS_FLASH_1;
77 panic ("configured to many flash banks!\n");
79 for (j = 0; j < flash_info[i].sector_count; j++) {
82 flash_info[i].start[j] = flashbase;
84 if ((j >= 1) && (j <= 2)) {
85 /* 2nd and 3rd are 8 KiB */
86 flash_info[i].start[j] =
87 flashbase + 0x4000 + 0x2000 * (j - 1);
91 flash_info[i].start[j] = flashbase + 0x8000;
93 if ((j >= 4) && (j <= 10)) {
95 flash_info[i].start[j] =
96 flashbase + 0x40000 + 0x40000 * (j -
100 size += flash_info[i].size;
103 flash_protect(FLAG_PROTECT_SET,
104 CONFIG_SYS_FLASH_BASE,
105 CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
111 #define CMD_READ_ARRAY 0x00F0
112 #define CMD_UNLOCK1 0x00AA
113 #define CMD_UNLOCK2 0x0055
114 #define CMD_ERASE_SETUP 0x0080
115 #define CMD_ERASE_CONFIRM 0x0030
116 #define CMD_PROGRAM 0x00A0
117 #define CMD_UNLOCK_BYPASS 0x0020
119 #define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
120 #define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
122 #define BIT_ERASE_DONE 0x0080
123 #define BIT_RDY_MASK 0x0080
124 #define BIT_PROGRAM_ERROR 0x0020
125 #define BIT_TIMEOUT 0x80000000 /* our flag */
132 int flash_erase(flash_info_t *info, int s_first, int s_last)
135 int iflag, cflag, prot, sect;
140 /* first look for protection bits */
142 if (info->flash_id == FLASH_UNKNOWN)
143 return ERR_UNKNOWN_FLASH_TYPE;
145 if ((s_first < 0) || (s_first > s_last)) {
149 if ((info->flash_id & FLASH_VENDMASK) !=
150 (AMD_MANUFACT & FLASH_VENDMASK)) {
151 return ERR_UNKNOWN_FLASH_VENDOR;
155 for (sect = s_first; sect <= s_last; ++sect) {
156 if (info->protect[sect]) {
161 return ERR_PROTECTED;
164 * Disable interrupts which might cause a timeout
165 * here. Remember that our exception vectors are
166 * at address 0 in the flash, and we don't want a
167 * (ticker) exception to happen while the flash
168 * chip is in programming mode.
171 cflag = icache_status();
173 iflag = disable_interrupts();
177 /* Start erase on unprotected sectors */
178 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
179 printf ("Erasing sector %2d ... ", sect);
181 /* arm simple, non interrupt dependent timer */
182 start = get_timer(0);
184 if (info->protect[sect] == 0) { /* not protected */
186 (volatile u16 *) (info->start[sect]);
188 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
189 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
190 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
192 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
193 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
194 *addr = CMD_ERASE_CONFIRM;
196 /* wait until flash is ready */
203 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
204 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
210 && (result & 0xFFFF) & BIT_ERASE_DONE)
215 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
227 } else { /* it was protected */
229 printf ("protected!\n");
234 printf ("User Interrupt!\n");
237 /* allow flash to settle - wait 10 ms */
249 static int write_word(flash_info_t *info, ulong dest, ulong data)
251 volatile u16 *addr = (volatile u16 *) dest;
259 * Check if Flash is (sufficiently) erased
262 if ((result & data) != data)
263 return ERR_NOT_ERASED;
267 * Disable interrupts which might cause a timeout
268 * here. Remember that our exception vectors are
269 * at address 0 in the flash, and we don't want a
270 * (ticker) exception to happen while the flash
271 * chip is in programming mode.
274 cflag = icache_status();
276 iflag = disable_interrupts();
278 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
279 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
280 MEM_FLASH_ADDR1 = CMD_PROGRAM;
283 /* arm simple, non interrupt dependent timer */
284 start = get_timer(0);
286 /* wait until flash is ready */
292 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
296 if (!chip1 && ((result & 0x80) == (data & 0x80)))
301 *addr = CMD_READ_ARRAY;
303 if (chip1 == ERR || *addr != data)
316 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
322 printf ("unaligned destination not supported\n");
328 printf ("odd transfer sizes not supported\n");
336 data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
338 if ((rc = write_word (info, wp - 1, data)) != 0) {
347 data = *((volatile u16 *) src);
348 if ((rc = write_word (info, wp, data)) != 0) {
357 data = (*((volatile u8 *) src) << 8) |
358 *((volatile u8 *) (wp + 1));
359 if ((rc = write_word (info, wp, data)) != 0) {