board/broadcom/bcmns2/northstar2.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2016 Broadcom Ltd.
   4  */
   5 #include <common.h>
   6 #include <cpu_func.h>
   7 #include <init.h>
   8 #include <asm/system.h>
   9 #include <asm/armv8/mmu.h>
  10
  11 static struct mm_region ns2_mem_map[] = {
  12         {
  13                 .virt = 0x0UL,
  14                 .phys = 0x0UL,
  15                 .size = 0x80000000UL,
  16                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  17                          PTE_BLOCK_NON_SHARE |
  18                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  19         }, {
  20                 .virt = 0x80000000UL,
  21                 .phys = 0x80000000UL,
  22                 .size = 0xff80000000UL,
  23                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  24                          PTE_BLOCK_INNER_SHARE
  25         }, {
  26                 /* List terminator */
  27                 0,
  28         }
  29 };
  30
  31 struct mm_region *mem_map = ns2_mem_map;
  32
  33 DECLARE_GLOBAL_DATA_PTR;
  34
  35 int board_init(void)
  36 {
  37         return 0;
  38 }
  39
  40 int dram_init(void)
  41 {
  42         gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  43                                     PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE);
  44         return 0;
  45 }
  46
  47 int dram_init_banksize(void)
  48 {
  49         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  50         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  51
  52         gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
  53         gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  54
  55         return 0;
  56 }
  57
  58 void reset_cpu(ulong addr)
  59 {
  60         psci_system_reset();
  61 }