1 // SPDX-License-Identifier: GPL-2.0+
6 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
9 * Board functions for TI AM335X based boards
11 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
15 #include <bootstage.h>
23 #include <asm/arch/cpu.h>
24 #include <asm/arch/hardware.h>
25 #include <asm/arch/omap.h>
26 #include <asm/arch/ddr_defs.h>
27 #include <asm/arch/clock.h>
28 #include <asm/arch/gpio.h>
29 #include <asm/arch/mmc_host_def.h>
30 #include <asm/arch/sys_proto.h>
31 #include <asm/arch/mem.h>
38 #include <power/tps65217.h>
39 #include <env_internal.h>
44 DECLARE_GLOBAL_DATA_PTR;
46 static struct shc_eeprom __attribute__((section(".data"))) header;
47 static int shc_eeprom_valid;
50 * Read header information from EEPROM into global structure.
52 static int read_eeprom(void)
54 /* Check if baseboard eeprom is available */
55 if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
56 puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
60 /* read the eeprom using i2c */
61 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
63 puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
67 if (header.magic != HDR_MAGIC) {
68 printf("Incorrect magic number (0x%x) in EEPROM\n",
78 static void shc_request_gpio(void)
80 gpio_request(LED_PWR_BL_GPIO, "LED PWR BL");
81 gpio_request(LED_PWR_RD_GPIO, "LED PWR RD");
82 gpio_request(RESET_GPIO, "reset");
83 gpio_request(WIFI_REGEN_GPIO, "WIFI REGEN");
84 gpio_request(WIFI_RST_GPIO, "WIFI rst");
85 gpio_request(ZIGBEE_RST_GPIO, "ZigBee rst");
86 gpio_request(BIDCOS_RST_GPIO, "BIDCOS rst");
87 gpio_request(ENOC_RST_GPIO, "ENOC rst");
88 #if defined CONFIG_B_SAMPLE
89 gpio_request(LED_PWR_GN_GPIO, "LED PWR GN");
90 gpio_request(LED_CONN_BL_GPIO, "LED CONN BL");
91 gpio_request(LED_CONN_RD_GPIO, "LED CONN RD");
92 gpio_request(LED_CONN_GN_GPIO, "LED CONN GN");
94 gpio_request(LED_LAN_BL_GPIO, "LED LAN BL");
95 gpio_request(LED_LAN_RD_GPIO, "LED LAN RD");
96 gpio_request(LED_CLOUD_BL_GPIO, "LED CLOUD BL");
97 gpio_request(LED_CLOUD_RD_GPIO, "LED CLOUD RD");
98 gpio_request(LED_PWM_GPIO, "LED PWM");
99 gpio_request(Z_WAVE_RST_GPIO, "Z WAVE rst");
101 gpio_request(BACK_BUTTON_GPIO, "Back button");
102 gpio_request(FRONT_BUTTON_GPIO, "Front button");
106 * Function which forces all installed modules into running state for ICT
107 * testing. Called by SPL.
109 static void __maybe_unused force_modules_running(void)
111 /* Wi-Fi power regulator enable - high = enabled */
112 gpio_direction_output(WIFI_REGEN_GPIO, 1);
114 * Wait for Wi-Fi power regulator to reach a stable voltage
115 * (soft-start time, max. 350 µs)
119 /* Wi-Fi module reset - high = running */
120 gpio_direction_output(WIFI_RST_GPIO, 1);
122 /* ZigBee reset - high = running */
123 gpio_direction_output(ZIGBEE_RST_GPIO, 1);
125 /* BidCos reset - high = running */
126 gpio_direction_output(BIDCOS_RST_GPIO, 1);
128 #if !defined(CONFIG_B_SAMPLE)
129 /* Z-Wave reset - high = running */
130 gpio_direction_output(Z_WAVE_RST_GPIO, 1);
133 /* EnOcean reset - low = running */
134 gpio_direction_output(ENOC_RST_GPIO, 0);
138 * Function which forces all installed modules into reset - to be released by
139 * the OS, called by SPL
141 static void __maybe_unused force_modules_reset(void)
143 /* Wi-Fi module reset - low = reset */
144 gpio_direction_output(WIFI_RST_GPIO, 0);
146 /* Wi-Fi power regulator enable - low = disabled */
147 gpio_direction_output(WIFI_REGEN_GPIO, 0);
149 /* ZigBee reset - low = reset */
150 gpio_direction_output(ZIGBEE_RST_GPIO, 0);
152 /* BidCos reset - low = reset */
153 /*gpio_direction_output(BIDCOS_RST_GPIO, 0);*/
155 #if !defined(CONFIG_B_SAMPLE)
156 /* Z-Wave reset - low = reset */
157 gpio_direction_output(Z_WAVE_RST_GPIO, 0);
160 /* EnOcean reset - high = reset*/
161 gpio_direction_output(ENOC_RST_GPIO, 1);
165 * Function to set the LEDs in the state "Bootloader booting"
167 static void __maybe_unused leds_set_booting(void)
169 #if defined(CONFIG_B_SAMPLE)
171 /* Turn all red LEDs on */
172 gpio_direction_output(LED_PWR_RD_GPIO, 1);
173 gpio_direction_output(LED_CONN_RD_GPIO, 1);
175 #else /* All other SHCs starting with B2-Sample */
176 /* Set the PWM GPIO */
177 gpio_direction_output(LED_PWM_GPIO, 1);
178 /* Turn all red LEDs on */
179 gpio_direction_output(LED_PWR_RD_GPIO, 1);
180 gpio_direction_output(LED_LAN_RD_GPIO, 1);
181 gpio_direction_output(LED_CLOUD_RD_GPIO, 1);
187 * Function to set the LEDs in the state "Bootloader error"
189 static void leds_set_failure(int state)
191 #if defined(CONFIG_B_SAMPLE)
192 /* Turn all blue and green LEDs off */
193 gpio_set_value(LED_PWR_BL_GPIO, 0);
194 gpio_set_value(LED_PWR_GN_GPIO, 0);
195 gpio_set_value(LED_CONN_BL_GPIO, 0);
196 gpio_set_value(LED_CONN_GN_GPIO, 0);
198 /* Turn all red LEDs to 'state' */
199 gpio_set_value(LED_PWR_RD_GPIO, state);
200 gpio_set_value(LED_CONN_RD_GPIO, state);
202 #else /* All other SHCs starting with B2-Sample */
203 /* Set the PWM GPIO */
204 gpio_direction_output(LED_PWM_GPIO, 1);
206 /* Turn all blue LEDs off */
207 gpio_set_value(LED_PWR_BL_GPIO, 0);
208 gpio_set_value(LED_LAN_BL_GPIO, 0);
209 gpio_set_value(LED_CLOUD_BL_GPIO, 0);
211 /* Turn all red LEDs to 'state' */
212 gpio_set_value(LED_PWR_RD_GPIO, state);
213 gpio_set_value(LED_LAN_RD_GPIO, state);
214 gpio_set_value(LED_CLOUD_RD_GPIO, state);
219 * Function to set the LEDs in the state "Bootloader finished"
221 static void leds_set_finish(void)
223 #if defined(CONFIG_B_SAMPLE)
224 /* Turn all LEDs off */
225 gpio_set_value(LED_PWR_BL_GPIO, 0);
226 gpio_set_value(LED_PWR_RD_GPIO, 0);
227 gpio_set_value(LED_PWR_GN_GPIO, 0);
228 gpio_set_value(LED_CONN_BL_GPIO, 0);
229 gpio_set_value(LED_CONN_RD_GPIO, 0);
230 gpio_set_value(LED_CONN_GN_GPIO, 0);
231 #else /* All other SHCs starting with B2-Sample */
232 /* Turn all LEDs off */
233 gpio_set_value(LED_PWR_BL_GPIO, 0);
234 gpio_set_value(LED_PWR_RD_GPIO, 0);
235 gpio_set_value(LED_LAN_BL_GPIO, 0);
236 gpio_set_value(LED_LAN_RD_GPIO, 0);
237 gpio_set_value(LED_CLOUD_BL_GPIO, 0);
238 gpio_set_value(LED_CLOUD_RD_GPIO, 0);
240 /* Turn off the PWM GPIO and mux it to EHRPWM */
241 gpio_set_value(LED_PWM_GPIO, 0);
242 enable_shc_board_pwm_pin_mux();
246 static void check_button_status(void)
249 gpio_direction_input(FRONT_BUTTON_GPIO);
250 value = gpio_get_value(FRONT_BUTTON_GPIO);
253 printf("front button activated !\n");
254 env_set("harakiri", "1");
258 #if defined(CONFIG_SPL_BUILD)
259 #ifdef CONFIG_SPL_OS_BOOT
260 int spl_start_uboot(void)
266 static void shc_board_early_init(void)
269 # ifdef CONFIG_SHC_ICT
270 /* Force all modules into enabled state for ICT testing */
271 force_modules_running();
273 /* Force all modules to enter Reset state until released by the OS */
274 force_modules_reset();
279 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
281 #define MPU_SPREADING_PERMILLE 18 /* Spread 1.8 percent */
282 #define OSC (V_OSCK/1000000)
283 /* Bosch: Predivider must be fixed to 4, so N = 4-1 */
284 #define MPUPLL_N (4-1)
285 /* Bosch: Fref = 24 MHz / (N+1) = 24 MHz / 4 = 6 MHz */
286 #define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
288 const struct dpll_params dpll_ddr_shc = {
289 400, OSC-1, 1, -1, -1, -1, -1};
291 const struct dpll_params *get_dpll_ddr_params(void)
293 return &dpll_ddr_shc;
297 * As we enabled downspread SSC with 1.8%, the values needed to be corrected
298 * such that the 20% overshoot will not lead to too high frequencies.
299 * In all cases, this is achieved by subtracting one from M (6 MHz less).
300 * Example: 600 MHz CPU
301 * Step size: 24 MHz OSC, N = 4 (fix) --> Fref = 6 MHz
302 * 600 MHz - 6 MHz (1x Fref) = 594 MHz
303 * SSC: 594 MHz * 1.8% = 10.7 MHz SSC
304 * Overshoot: 10.7 MHz * 20 % = 2.2 MHz
305 * --> Fmax = 594 MHz + 2.2 MHz = 596.2 MHz, lower than 600 MHz --> OK!
307 const struct dpll_params dpll_mpu_shc_opp100 = {
308 99, MPUPLL_N, 1, -1, -1, -1, -1};
310 void am33xx_spl_board_init(void)
318 * Set CORE Frequency to OPP100
319 * Hint: DCDC3 (CORE) defaults to 1.100V (for OPP100)
321 do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
323 sil_rev = readl(&cdev->deviceid) >> 28;
325 puts("We do not support Silicon Revisions below 2.0!\n");
329 dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
330 if (i2c_probe(TPS65217_CHIP_PM))
334 * Retrieve the CPU max frequency by reading the efuse
335 * SHC-Default: 600 MHz
337 switch (dpll_mpu_opp100.m) {
339 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
342 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
345 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1200MV;
348 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1100MV;
351 mpu_vdd = TPS65217_DCDC_VOLT_SEL_950MV;
354 puts("Cannot determine the frequency, failing!\n");
358 if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
359 puts("tps65217_voltage_update failure\n");
363 /* Set MPU Frequency to what we detected */
364 printf("MPU reference clock runs at %d MHz\n", MPUPLL_FREF);
365 printf("Setting MPU clock to %d MHz\n", MPUPLL_FREF *
366 dpll_mpu_shc_opp100.m);
367 do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_shc_opp100);
369 /* Enable Spread Spectrum for this freq to be clean on EMI side */
370 set_mpu_spreadspectrum(MPU_SPREADING_PERMILLE);
373 * Using the default voltages for the PMIC (TPS65217D)
374 * LS1 = 1.8V (VDD_1V8)
375 * LS2 = 3.3V (VDD_3V3A)
376 * LDO1 = 1.8V (VIO and VRTC)
377 * LDO2 = 3.3V (VDD_3V3AUX)
379 shc_board_early_init();
382 void set_uart_mux_conf(void)
384 enable_uart0_pin_mux();
387 void set_mux_conf_regs(void)
389 enable_shc_board_pin_mux();
392 const struct ctrl_ioregs ioregs_evmsk = {
393 .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
394 .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
395 .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
396 .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
397 .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
400 static const struct ddr_data ddr3_shc_data = {
401 .datardsratio0 = MT41K256M16HA125E_RD_DQS,
402 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
403 .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
404 .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
407 static const struct cmd_control ddr3_shc_cmd_ctrl_data = {
408 .cmd0csratio = MT41K256M16HA125E_RATIO,
409 .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
411 .cmd1csratio = MT41K256M16HA125E_RATIO,
412 .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
414 .cmd2csratio = MT41K256M16HA125E_RATIO,
415 .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
418 static struct emif_regs ddr3_shc_emif_reg_data = {
419 .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
420 .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
421 .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
422 .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
423 .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
424 .zq_config = MT41K256M16HA125E_ZQ_CFG,
425 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
429 void sdram_init(void)
431 /* Configure the DDR3 RAM */
432 config_ddr(400, &ioregs_evmsk, &ddr3_shc_data,
433 &ddr3_shc_cmd_ctrl_data, &ddr3_shc_emif_reg_data, 0);
438 * Basic board specific setup. Pinmux has been handled already.
442 #if defined(CONFIG_HW_WATCHDOG)
445 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
446 if (read_eeprom() < 0)
447 puts("EEPROM Content Invalid.\n");
449 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
450 #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
458 #ifdef CONFIG_BOARD_LATE_INIT
459 int board_late_init(void)
461 check_button_status();
462 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
463 if (shc_eeprom_valid)
464 if (is_valid_ethaddr(header.mac_addr))
465 eth_env_set_enetaddr("ethaddr", header.mac_addr);
472 #if defined(CONFIG_USB_ETHER) && \
473 (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
474 int board_eth_init(bd_t *bis)
476 return usb_eth_initialize(bis);
480 #ifdef CONFIG_SHOW_BOOT_PROGRESS
481 static void bosch_check_reset_pin(void)
483 if (readl(GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0) & RESET_MASK) {
484 printf("Resetting ...\n");
485 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
486 disable_interrupts();
492 static void hang_bosch(const char *cause, int code)
496 gpio_direction_input(RESET_GPIO);
498 /* Enable reset pin interrupt on falling edge */
499 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
500 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_FALLINGDETECT);
505 for (lv = 0; lv < code; lv++) {
506 bosch_check_reset_pin();
508 __udelay(150 * 1000);
510 __udelay(150 * 1000);
512 #if defined(BLINK_CODE)
513 __udelay(300 * 1000);
518 void show_boot_progress(int val)
521 case BOOTSTAGE_ID_NEED_RESET:
522 hang_bosch("need reset", 4);
527 void arch_preboot_os(void)