1 // SPDX-License-Identifier: GPL-2.0+
6 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
9 * Board functions for TI AM335X based boards
11 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
15 #include <bootstage.h>
23 #include <asm/arch/cpu.h>
24 #include <asm/arch/hardware.h>
25 #include <asm/arch/omap.h>
26 #include <asm/arch/ddr_defs.h>
27 #include <asm/arch/clock.h>
28 #include <asm/arch/gpio.h>
29 #include <asm/arch/mmc_host_def.h>
30 #include <asm/arch/sys_proto.h>
31 #include <asm/arch/mem.h>
38 #include <linux/delay.h>
39 #include <power/tps65217.h>
40 #include <env_internal.h>
45 DECLARE_GLOBAL_DATA_PTR;
47 static struct shc_eeprom __attribute__((section(".data"))) header;
48 static int shc_eeprom_valid;
51 * Read header information from EEPROM into global structure.
53 static int read_eeprom(void)
55 /* Check if baseboard eeprom is available */
56 if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
57 puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
61 /* read the eeprom using i2c */
62 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
64 puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
68 if (header.magic != HDR_MAGIC) {
69 printf("Incorrect magic number (0x%x) in EEPROM\n",
79 static void shc_request_gpio(void)
81 gpio_request(LED_PWR_BL_GPIO, "LED PWR BL");
82 gpio_request(LED_PWR_RD_GPIO, "LED PWR RD");
83 gpio_request(RESET_GPIO, "reset");
84 gpio_request(WIFI_REGEN_GPIO, "WIFI REGEN");
85 gpio_request(WIFI_RST_GPIO, "WIFI rst");
86 gpio_request(ZIGBEE_RST_GPIO, "ZigBee rst");
87 gpio_request(BIDCOS_RST_GPIO, "BIDCOS rst");
88 gpio_request(ENOC_RST_GPIO, "ENOC rst");
89 #if defined CONFIG_B_SAMPLE
90 gpio_request(LED_PWR_GN_GPIO, "LED PWR GN");
91 gpio_request(LED_CONN_BL_GPIO, "LED CONN BL");
92 gpio_request(LED_CONN_RD_GPIO, "LED CONN RD");
93 gpio_request(LED_CONN_GN_GPIO, "LED CONN GN");
95 gpio_request(LED_LAN_BL_GPIO, "LED LAN BL");
96 gpio_request(LED_LAN_RD_GPIO, "LED LAN RD");
97 gpio_request(LED_CLOUD_BL_GPIO, "LED CLOUD BL");
98 gpio_request(LED_CLOUD_RD_GPIO, "LED CLOUD RD");
99 gpio_request(LED_PWM_GPIO, "LED PWM");
100 gpio_request(Z_WAVE_RST_GPIO, "Z WAVE rst");
102 gpio_request(BACK_BUTTON_GPIO, "Back button");
103 gpio_request(FRONT_BUTTON_GPIO, "Front button");
107 * Function which forces all installed modules into running state for ICT
108 * testing. Called by SPL.
110 static void __maybe_unused force_modules_running(void)
112 /* Wi-Fi power regulator enable - high = enabled */
113 gpio_direction_output(WIFI_REGEN_GPIO, 1);
115 * Wait for Wi-Fi power regulator to reach a stable voltage
116 * (soft-start time, max. 350 µs)
120 /* Wi-Fi module reset - high = running */
121 gpio_direction_output(WIFI_RST_GPIO, 1);
123 /* ZigBee reset - high = running */
124 gpio_direction_output(ZIGBEE_RST_GPIO, 1);
126 /* BidCos reset - high = running */
127 gpio_direction_output(BIDCOS_RST_GPIO, 1);
129 #if !defined(CONFIG_B_SAMPLE)
130 /* Z-Wave reset - high = running */
131 gpio_direction_output(Z_WAVE_RST_GPIO, 1);
134 /* EnOcean reset - low = running */
135 gpio_direction_output(ENOC_RST_GPIO, 0);
139 * Function which forces all installed modules into reset - to be released by
140 * the OS, called by SPL
142 static void __maybe_unused force_modules_reset(void)
144 /* Wi-Fi module reset - low = reset */
145 gpio_direction_output(WIFI_RST_GPIO, 0);
147 /* Wi-Fi power regulator enable - low = disabled */
148 gpio_direction_output(WIFI_REGEN_GPIO, 0);
150 /* ZigBee reset - low = reset */
151 gpio_direction_output(ZIGBEE_RST_GPIO, 0);
153 /* BidCos reset - low = reset */
154 /*gpio_direction_output(BIDCOS_RST_GPIO, 0);*/
156 #if !defined(CONFIG_B_SAMPLE)
157 /* Z-Wave reset - low = reset */
158 gpio_direction_output(Z_WAVE_RST_GPIO, 0);
161 /* EnOcean reset - high = reset*/
162 gpio_direction_output(ENOC_RST_GPIO, 1);
166 * Function to set the LEDs in the state "Bootloader booting"
168 static void __maybe_unused leds_set_booting(void)
170 #if defined(CONFIG_B_SAMPLE)
172 /* Turn all red LEDs on */
173 gpio_direction_output(LED_PWR_RD_GPIO, 1);
174 gpio_direction_output(LED_CONN_RD_GPIO, 1);
176 #else /* All other SHCs starting with B2-Sample */
177 /* Set the PWM GPIO */
178 gpio_direction_output(LED_PWM_GPIO, 1);
179 /* Turn all red LEDs on */
180 gpio_direction_output(LED_PWR_RD_GPIO, 1);
181 gpio_direction_output(LED_LAN_RD_GPIO, 1);
182 gpio_direction_output(LED_CLOUD_RD_GPIO, 1);
188 * Function to set the LEDs in the state "Bootloader error"
190 static void leds_set_failure(int state)
192 #if defined(CONFIG_B_SAMPLE)
193 /* Turn all blue and green LEDs off */
194 gpio_set_value(LED_PWR_BL_GPIO, 0);
195 gpio_set_value(LED_PWR_GN_GPIO, 0);
196 gpio_set_value(LED_CONN_BL_GPIO, 0);
197 gpio_set_value(LED_CONN_GN_GPIO, 0);
199 /* Turn all red LEDs to 'state' */
200 gpio_set_value(LED_PWR_RD_GPIO, state);
201 gpio_set_value(LED_CONN_RD_GPIO, state);
203 #else /* All other SHCs starting with B2-Sample */
204 /* Set the PWM GPIO */
205 gpio_direction_output(LED_PWM_GPIO, 1);
207 /* Turn all blue LEDs off */
208 gpio_set_value(LED_PWR_BL_GPIO, 0);
209 gpio_set_value(LED_LAN_BL_GPIO, 0);
210 gpio_set_value(LED_CLOUD_BL_GPIO, 0);
212 /* Turn all red LEDs to 'state' */
213 gpio_set_value(LED_PWR_RD_GPIO, state);
214 gpio_set_value(LED_LAN_RD_GPIO, state);
215 gpio_set_value(LED_CLOUD_RD_GPIO, state);
220 * Function to set the LEDs in the state "Bootloader finished"
222 static void leds_set_finish(void)
224 #if defined(CONFIG_B_SAMPLE)
225 /* Turn all LEDs off */
226 gpio_set_value(LED_PWR_BL_GPIO, 0);
227 gpio_set_value(LED_PWR_RD_GPIO, 0);
228 gpio_set_value(LED_PWR_GN_GPIO, 0);
229 gpio_set_value(LED_CONN_BL_GPIO, 0);
230 gpio_set_value(LED_CONN_RD_GPIO, 0);
231 gpio_set_value(LED_CONN_GN_GPIO, 0);
232 #else /* All other SHCs starting with B2-Sample */
233 /* Turn all LEDs off */
234 gpio_set_value(LED_PWR_BL_GPIO, 0);
235 gpio_set_value(LED_PWR_RD_GPIO, 0);
236 gpio_set_value(LED_LAN_BL_GPIO, 0);
237 gpio_set_value(LED_LAN_RD_GPIO, 0);
238 gpio_set_value(LED_CLOUD_BL_GPIO, 0);
239 gpio_set_value(LED_CLOUD_RD_GPIO, 0);
241 /* Turn off the PWM GPIO and mux it to EHRPWM */
242 gpio_set_value(LED_PWM_GPIO, 0);
243 enable_shc_board_pwm_pin_mux();
247 static void check_button_status(void)
250 gpio_direction_input(FRONT_BUTTON_GPIO);
251 value = gpio_get_value(FRONT_BUTTON_GPIO);
254 printf("front button activated !\n");
255 env_set("harakiri", "1");
259 #if defined(CONFIG_SPL_BUILD)
260 #ifdef CONFIG_SPL_OS_BOOT
261 int spl_start_uboot(void)
267 static void shc_board_early_init(void)
270 # ifdef CONFIG_SHC_ICT
271 /* Force all modules into enabled state for ICT testing */
272 force_modules_running();
274 /* Force all modules to enter Reset state until released by the OS */
275 force_modules_reset();
280 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
282 #define MPU_SPREADING_PERMILLE 18 /* Spread 1.8 percent */
283 #define OSC (V_OSCK/1000000)
284 /* Bosch: Predivider must be fixed to 4, so N = 4-1 */
285 #define MPUPLL_N (4-1)
286 /* Bosch: Fref = 24 MHz / (N+1) = 24 MHz / 4 = 6 MHz */
287 #define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
289 const struct dpll_params dpll_ddr_shc = {
290 400, OSC-1, 1, -1, -1, -1, -1};
292 const struct dpll_params *get_dpll_ddr_params(void)
294 return &dpll_ddr_shc;
298 * As we enabled downspread SSC with 1.8%, the values needed to be corrected
299 * such that the 20% overshoot will not lead to too high frequencies.
300 * In all cases, this is achieved by subtracting one from M (6 MHz less).
301 * Example: 600 MHz CPU
302 * Step size: 24 MHz OSC, N = 4 (fix) --> Fref = 6 MHz
303 * 600 MHz - 6 MHz (1x Fref) = 594 MHz
304 * SSC: 594 MHz * 1.8% = 10.7 MHz SSC
305 * Overshoot: 10.7 MHz * 20 % = 2.2 MHz
306 * --> Fmax = 594 MHz + 2.2 MHz = 596.2 MHz, lower than 600 MHz --> OK!
308 const struct dpll_params dpll_mpu_shc_opp100 = {
309 99, MPUPLL_N, 1, -1, -1, -1, -1};
311 void am33xx_spl_board_init(void)
319 * Set CORE Frequency to OPP100
320 * Hint: DCDC3 (CORE) defaults to 1.100V (for OPP100)
322 do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
324 sil_rev = readl(&cdev->deviceid) >> 28;
326 puts("We do not support Silicon Revisions below 2.0!\n");
330 dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
331 if (i2c_probe(TPS65217_CHIP_PM))
335 * Retrieve the CPU max frequency by reading the efuse
336 * SHC-Default: 600 MHz
338 switch (dpll_mpu_opp100.m) {
340 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
343 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
346 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1200MV;
349 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1100MV;
352 mpu_vdd = TPS65217_DCDC_VOLT_SEL_950MV;
355 puts("Cannot determine the frequency, failing!\n");
359 if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
360 puts("tps65217_voltage_update failure\n");
364 /* Set MPU Frequency to what we detected */
365 printf("MPU reference clock runs at %d MHz\n", MPUPLL_FREF);
366 printf("Setting MPU clock to %d MHz\n", MPUPLL_FREF *
367 dpll_mpu_shc_opp100.m);
368 do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_shc_opp100);
370 /* Enable Spread Spectrum for this freq to be clean on EMI side */
371 set_mpu_spreadspectrum(MPU_SPREADING_PERMILLE);
374 * Using the default voltages for the PMIC (TPS65217D)
375 * LS1 = 1.8V (VDD_1V8)
376 * LS2 = 3.3V (VDD_3V3A)
377 * LDO1 = 1.8V (VIO and VRTC)
378 * LDO2 = 3.3V (VDD_3V3AUX)
380 shc_board_early_init();
383 void set_uart_mux_conf(void)
385 enable_uart0_pin_mux();
388 void set_mux_conf_regs(void)
390 enable_shc_board_pin_mux();
393 const struct ctrl_ioregs ioregs_evmsk = {
394 .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
395 .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
396 .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
397 .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
398 .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
401 static const struct ddr_data ddr3_shc_data = {
402 .datardsratio0 = MT41K256M16HA125E_RD_DQS,
403 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
404 .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
405 .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
408 static const struct cmd_control ddr3_shc_cmd_ctrl_data = {
409 .cmd0csratio = MT41K256M16HA125E_RATIO,
410 .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
412 .cmd1csratio = MT41K256M16HA125E_RATIO,
413 .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
415 .cmd2csratio = MT41K256M16HA125E_RATIO,
416 .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
419 static struct emif_regs ddr3_shc_emif_reg_data = {
420 .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
421 .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
422 .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
423 .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
424 .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
425 .zq_config = MT41K256M16HA125E_ZQ_CFG,
426 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
430 void sdram_init(void)
432 /* Configure the DDR3 RAM */
433 config_ddr(400, &ioregs_evmsk, &ddr3_shc_data,
434 &ddr3_shc_cmd_ctrl_data, &ddr3_shc_emif_reg_data, 0);
439 * Basic board specific setup. Pinmux has been handled already.
443 #if defined(CONFIG_HW_WATCHDOG)
446 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
447 if (read_eeprom() < 0)
448 puts("EEPROM Content Invalid.\n");
450 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
451 #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
459 #ifdef CONFIG_BOARD_LATE_INIT
460 int board_late_init(void)
462 check_button_status();
463 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
464 if (shc_eeprom_valid)
465 if (is_valid_ethaddr(header.mac_addr))
466 eth_env_set_enetaddr("ethaddr", header.mac_addr);
473 #if defined(CONFIG_USB_ETHER) && \
474 (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
475 int board_eth_init(bd_t *bis)
477 return usb_eth_initialize(bis);
481 #ifdef CONFIG_SHOW_BOOT_PROGRESS
482 static void bosch_check_reset_pin(void)
484 if (readl(GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0) & RESET_MASK) {
485 printf("Resetting ...\n");
486 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
487 disable_interrupts();
493 static void hang_bosch(const char *cause, int code)
497 gpio_direction_input(RESET_GPIO);
499 /* Enable reset pin interrupt on falling edge */
500 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
501 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_FALLINGDETECT);
506 for (lv = 0; lv < code; lv++) {
507 bosch_check_reset_pin();
509 __udelay(150 * 1000);
511 __udelay(150 * 1000);
513 #if defined(BLINK_CODE)
514 __udelay(300 * 1000);
519 void show_boot_progress(int val)
522 case BOOTSTAGE_ID_NEED_RESET:
523 hang_bosch("need reset", 4);
528 void arch_preboot_os(void)