1 // SPDX-License-Identifier: GPL-2.0+
6 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
9 * Board functions for TI AM335X based boards
11 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
19 #include <asm/arch/cpu.h>
20 #include <asm/arch/hardware.h>
21 #include <asm/arch/omap.h>
22 #include <asm/arch/ddr_defs.h>
23 #include <asm/arch/clock.h>
24 #include <asm/arch/gpio.h>
25 #include <asm/arch/mmc_host_def.h>
26 #include <asm/arch/sys_proto.h>
27 #include <asm/arch/mem.h>
34 #include <power/tps65217.h>
35 #include <env_internal.h>
40 DECLARE_GLOBAL_DATA_PTR;
42 static struct shc_eeprom __attribute__((section(".data"))) header;
43 static int shc_eeprom_valid;
46 * Read header information from EEPROM into global structure.
48 static int read_eeprom(void)
50 /* Check if baseboard eeprom is available */
51 if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
52 puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
56 /* read the eeprom using i2c */
57 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
59 puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
63 if (header.magic != HDR_MAGIC) {
64 printf("Incorrect magic number (0x%x) in EEPROM\n",
74 static void shc_request_gpio(void)
76 gpio_request(LED_PWR_BL_GPIO, "LED PWR BL");
77 gpio_request(LED_PWR_RD_GPIO, "LED PWR RD");
78 gpio_request(RESET_GPIO, "reset");
79 gpio_request(WIFI_REGEN_GPIO, "WIFI REGEN");
80 gpio_request(WIFI_RST_GPIO, "WIFI rst");
81 gpio_request(ZIGBEE_RST_GPIO, "ZigBee rst");
82 gpio_request(BIDCOS_RST_GPIO, "BIDCOS rst");
83 gpio_request(ENOC_RST_GPIO, "ENOC rst");
84 #if defined CONFIG_B_SAMPLE
85 gpio_request(LED_PWR_GN_GPIO, "LED PWR GN");
86 gpio_request(LED_CONN_BL_GPIO, "LED CONN BL");
87 gpio_request(LED_CONN_RD_GPIO, "LED CONN RD");
88 gpio_request(LED_CONN_GN_GPIO, "LED CONN GN");
90 gpio_request(LED_LAN_BL_GPIO, "LED LAN BL");
91 gpio_request(LED_LAN_RD_GPIO, "LED LAN RD");
92 gpio_request(LED_CLOUD_BL_GPIO, "LED CLOUD BL");
93 gpio_request(LED_CLOUD_RD_GPIO, "LED CLOUD RD");
94 gpio_request(LED_PWM_GPIO, "LED PWM");
95 gpio_request(Z_WAVE_RST_GPIO, "Z WAVE rst");
97 gpio_request(BACK_BUTTON_GPIO, "Back button");
98 gpio_request(FRONT_BUTTON_GPIO, "Front button");
102 * Function which forces all installed modules into running state for ICT
103 * testing. Called by SPL.
105 static void __maybe_unused force_modules_running(void)
107 /* Wi-Fi power regulator enable - high = enabled */
108 gpio_direction_output(WIFI_REGEN_GPIO, 1);
110 * Wait for Wi-Fi power regulator to reach a stable voltage
111 * (soft-start time, max. 350 µs)
115 /* Wi-Fi module reset - high = running */
116 gpio_direction_output(WIFI_RST_GPIO, 1);
118 /* ZigBee reset - high = running */
119 gpio_direction_output(ZIGBEE_RST_GPIO, 1);
121 /* BidCos reset - high = running */
122 gpio_direction_output(BIDCOS_RST_GPIO, 1);
124 #if !defined(CONFIG_B_SAMPLE)
125 /* Z-Wave reset - high = running */
126 gpio_direction_output(Z_WAVE_RST_GPIO, 1);
129 /* EnOcean reset - low = running */
130 gpio_direction_output(ENOC_RST_GPIO, 0);
134 * Function which forces all installed modules into reset - to be released by
135 * the OS, called by SPL
137 static void __maybe_unused force_modules_reset(void)
139 /* Wi-Fi module reset - low = reset */
140 gpio_direction_output(WIFI_RST_GPIO, 0);
142 /* Wi-Fi power regulator enable - low = disabled */
143 gpio_direction_output(WIFI_REGEN_GPIO, 0);
145 /* ZigBee reset - low = reset */
146 gpio_direction_output(ZIGBEE_RST_GPIO, 0);
148 /* BidCos reset - low = reset */
149 /*gpio_direction_output(BIDCOS_RST_GPIO, 0);*/
151 #if !defined(CONFIG_B_SAMPLE)
152 /* Z-Wave reset - low = reset */
153 gpio_direction_output(Z_WAVE_RST_GPIO, 0);
156 /* EnOcean reset - high = reset*/
157 gpio_direction_output(ENOC_RST_GPIO, 1);
161 * Function to set the LEDs in the state "Bootloader booting"
163 static void __maybe_unused leds_set_booting(void)
165 #if defined(CONFIG_B_SAMPLE)
167 /* Turn all red LEDs on */
168 gpio_direction_output(LED_PWR_RD_GPIO, 1);
169 gpio_direction_output(LED_CONN_RD_GPIO, 1);
171 #else /* All other SHCs starting with B2-Sample */
172 /* Set the PWM GPIO */
173 gpio_direction_output(LED_PWM_GPIO, 1);
174 /* Turn all red LEDs on */
175 gpio_direction_output(LED_PWR_RD_GPIO, 1);
176 gpio_direction_output(LED_LAN_RD_GPIO, 1);
177 gpio_direction_output(LED_CLOUD_RD_GPIO, 1);
183 * Function to set the LEDs in the state "Bootloader error"
185 static void leds_set_failure(int state)
187 #if defined(CONFIG_B_SAMPLE)
188 /* Turn all blue and green LEDs off */
189 gpio_set_value(LED_PWR_BL_GPIO, 0);
190 gpio_set_value(LED_PWR_GN_GPIO, 0);
191 gpio_set_value(LED_CONN_BL_GPIO, 0);
192 gpio_set_value(LED_CONN_GN_GPIO, 0);
194 /* Turn all red LEDs to 'state' */
195 gpio_set_value(LED_PWR_RD_GPIO, state);
196 gpio_set_value(LED_CONN_RD_GPIO, state);
198 #else /* All other SHCs starting with B2-Sample */
199 /* Set the PWM GPIO */
200 gpio_direction_output(LED_PWM_GPIO, 1);
202 /* Turn all blue LEDs off */
203 gpio_set_value(LED_PWR_BL_GPIO, 0);
204 gpio_set_value(LED_LAN_BL_GPIO, 0);
205 gpio_set_value(LED_CLOUD_BL_GPIO, 0);
207 /* Turn all red LEDs to 'state' */
208 gpio_set_value(LED_PWR_RD_GPIO, state);
209 gpio_set_value(LED_LAN_RD_GPIO, state);
210 gpio_set_value(LED_CLOUD_RD_GPIO, state);
215 * Function to set the LEDs in the state "Bootloader finished"
217 static void leds_set_finish(void)
219 #if defined(CONFIG_B_SAMPLE)
220 /* Turn all LEDs off */
221 gpio_set_value(LED_PWR_BL_GPIO, 0);
222 gpio_set_value(LED_PWR_RD_GPIO, 0);
223 gpio_set_value(LED_PWR_GN_GPIO, 0);
224 gpio_set_value(LED_CONN_BL_GPIO, 0);
225 gpio_set_value(LED_CONN_RD_GPIO, 0);
226 gpio_set_value(LED_CONN_GN_GPIO, 0);
227 #else /* All other SHCs starting with B2-Sample */
228 /* Turn all LEDs off */
229 gpio_set_value(LED_PWR_BL_GPIO, 0);
230 gpio_set_value(LED_PWR_RD_GPIO, 0);
231 gpio_set_value(LED_LAN_BL_GPIO, 0);
232 gpio_set_value(LED_LAN_RD_GPIO, 0);
233 gpio_set_value(LED_CLOUD_BL_GPIO, 0);
234 gpio_set_value(LED_CLOUD_RD_GPIO, 0);
236 /* Turn off the PWM GPIO and mux it to EHRPWM */
237 gpio_set_value(LED_PWM_GPIO, 0);
238 enable_shc_board_pwm_pin_mux();
242 static void check_button_status(void)
245 gpio_direction_input(FRONT_BUTTON_GPIO);
246 value = gpio_get_value(FRONT_BUTTON_GPIO);
249 printf("front button activated !\n");
250 env_set("harakiri", "1");
254 #if defined(CONFIG_SPL_BUILD)
255 #ifdef CONFIG_SPL_OS_BOOT
256 int spl_start_uboot(void)
262 static void shc_board_early_init(void)
265 # ifdef CONFIG_SHC_ICT
266 /* Force all modules into enabled state for ICT testing */
267 force_modules_running();
269 /* Force all modules to enter Reset state until released by the OS */
270 force_modules_reset();
275 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
277 #define MPU_SPREADING_PERMILLE 18 /* Spread 1.8 percent */
278 #define OSC (V_OSCK/1000000)
279 /* Bosch: Predivider must be fixed to 4, so N = 4-1 */
280 #define MPUPLL_N (4-1)
281 /* Bosch: Fref = 24 MHz / (N+1) = 24 MHz / 4 = 6 MHz */
282 #define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
284 const struct dpll_params dpll_ddr_shc = {
285 400, OSC-1, 1, -1, -1, -1, -1};
287 const struct dpll_params *get_dpll_ddr_params(void)
289 return &dpll_ddr_shc;
293 * As we enabled downspread SSC with 1.8%, the values needed to be corrected
294 * such that the 20% overshoot will not lead to too high frequencies.
295 * In all cases, this is achieved by subtracting one from M (6 MHz less).
296 * Example: 600 MHz CPU
297 * Step size: 24 MHz OSC, N = 4 (fix) --> Fref = 6 MHz
298 * 600 MHz - 6 MHz (1x Fref) = 594 MHz
299 * SSC: 594 MHz * 1.8% = 10.7 MHz SSC
300 * Overshoot: 10.7 MHz * 20 % = 2.2 MHz
301 * --> Fmax = 594 MHz + 2.2 MHz = 596.2 MHz, lower than 600 MHz --> OK!
303 const struct dpll_params dpll_mpu_shc_opp100 = {
304 99, MPUPLL_N, 1, -1, -1, -1, -1};
306 void am33xx_spl_board_init(void)
314 * Set CORE Frequency to OPP100
315 * Hint: DCDC3 (CORE) defaults to 1.100V (for OPP100)
317 do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
319 sil_rev = readl(&cdev->deviceid) >> 28;
321 puts("We do not support Silicon Revisions below 2.0!\n");
325 dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
326 if (i2c_probe(TPS65217_CHIP_PM))
330 * Retrieve the CPU max frequency by reading the efuse
331 * SHC-Default: 600 MHz
333 switch (dpll_mpu_opp100.m) {
335 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
338 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
341 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1200MV;
344 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1100MV;
347 mpu_vdd = TPS65217_DCDC_VOLT_SEL_950MV;
350 puts("Cannot determine the frequency, failing!\n");
354 if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
355 puts("tps65217_voltage_update failure\n");
359 /* Set MPU Frequency to what we detected */
360 printf("MPU reference clock runs at %d MHz\n", MPUPLL_FREF);
361 printf("Setting MPU clock to %d MHz\n", MPUPLL_FREF *
362 dpll_mpu_shc_opp100.m);
363 do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_shc_opp100);
365 /* Enable Spread Spectrum for this freq to be clean on EMI side */
366 set_mpu_spreadspectrum(MPU_SPREADING_PERMILLE);
369 * Using the default voltages for the PMIC (TPS65217D)
370 * LS1 = 1.8V (VDD_1V8)
371 * LS2 = 3.3V (VDD_3V3A)
372 * LDO1 = 1.8V (VIO and VRTC)
373 * LDO2 = 3.3V (VDD_3V3AUX)
375 shc_board_early_init();
378 void set_uart_mux_conf(void)
380 enable_uart0_pin_mux();
383 void set_mux_conf_regs(void)
385 enable_shc_board_pin_mux();
388 const struct ctrl_ioregs ioregs_evmsk = {
389 .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
390 .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
391 .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
392 .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
393 .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
396 static const struct ddr_data ddr3_shc_data = {
397 .datardsratio0 = MT41K256M16HA125E_RD_DQS,
398 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
399 .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
400 .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
403 static const struct cmd_control ddr3_shc_cmd_ctrl_data = {
404 .cmd0csratio = MT41K256M16HA125E_RATIO,
405 .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
407 .cmd1csratio = MT41K256M16HA125E_RATIO,
408 .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
410 .cmd2csratio = MT41K256M16HA125E_RATIO,
411 .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
414 static struct emif_regs ddr3_shc_emif_reg_data = {
415 .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
416 .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
417 .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
418 .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
419 .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
420 .zq_config = MT41K256M16HA125E_ZQ_CFG,
421 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
425 void sdram_init(void)
427 /* Configure the DDR3 RAM */
428 config_ddr(400, &ioregs_evmsk, &ddr3_shc_data,
429 &ddr3_shc_cmd_ctrl_data, &ddr3_shc_emif_reg_data, 0);
434 * Basic board specific setup. Pinmux has been handled already.
438 #if defined(CONFIG_HW_WATCHDOG)
441 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
442 if (read_eeprom() < 0)
443 puts("EEPROM Content Invalid.\n");
445 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
446 #if defined(CONFIG_NOR) || defined(CONFIG_NAND)
454 #ifdef CONFIG_BOARD_LATE_INIT
455 int board_late_init(void)
457 check_button_status();
458 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
459 if (shc_eeprom_valid)
460 if (is_valid_ethaddr(header.mac_addr))
461 eth_env_set_enetaddr("ethaddr", header.mac_addr);
468 #if defined(CONFIG_USB_ETHER) && \
469 (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
470 int board_eth_init(bd_t *bis)
472 return usb_eth_initialize(bis);
476 #ifdef CONFIG_SHOW_BOOT_PROGRESS
477 static void bosch_check_reset_pin(void)
479 if (readl(GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0) & RESET_MASK) {
480 printf("Resetting ...\n");
481 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
482 disable_interrupts();
488 static void hang_bosch(const char *cause, int code)
492 gpio_direction_input(RESET_GPIO);
494 /* Enable reset pin interrupt on falling edge */
495 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
496 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_FALLINGDETECT);
501 for (lv = 0; lv < code; lv++) {
502 bosch_check_reset_pin();
504 __udelay(150 * 1000);
506 __udelay(150 * 1000);
508 #if defined(BLINK_CODE)
509 __udelay(300 * 1000);
514 void show_boot_progress(int val)
517 case BOOTSTAGE_ID_NEED_RESET:
518 hang_bosch("need reset", 4);
523 void arch_preboot_os(void)