1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 Allied Telesis Labs
12 #include <linux/mbus.h>
14 #include <asm/arch/cpu.h>
15 #include <asm/arch/soc.h>
16 #include "../common/gpio_hog.h"
18 #include "../drivers/ddr/marvell/a38x/ddr3_init.h"
19 #include <../serdes/a38x/high_speed_env_spec.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 #define MVEBU_DEV_BUS_BASE (MVEBU_REGISTER(0x10400))
25 #define CONFIG_NVS_LOCATION 0xf4800000
26 #define CONFIG_NVS_SIZE (512 << 10)
28 #ifdef CONFIG_WATCHDOG
29 static struct udevice *watchdog_dev;
32 static struct serdes_map board_serdes_map[] = {
33 {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
34 {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
35 {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
36 {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
37 {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
38 {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}
41 int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)
43 *serdes_map_array = board_serdes_map;
44 *count = ARRAY_SIZE(board_serdes_map);
49 * Define the DDR layout / topology here in the board file. This will
50 * be used by the DDR3 init code in the SPL U-Boot version to configure
51 * the DDR3 controller.
53 static struct mv_ddr_topology_map board_topology_map = {
55 0x1, /* active interfaces */
56 /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */
62 SPEED_BIN_DDR_1866M, /* speed_bin */
63 MV_DDR_DEV_WIDTH_16BIT, /* sdram device width */
64 MV_DDR_DIE_CAP_4GBIT, /* die capacity */
65 MV_DDR_FREQ_SAR, /* frequency */
66 0, 0, /* cas_l cas_wl */
67 MV_DDR_TEMP_LOW, /* temperature */
68 MV_DDR_TIM_2T} }, /* timing */
69 BUS_MASK_32BIT_ECC, /* subphys mask */
70 MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
71 { {0} }, /* raw spd data */
72 {0} /* timing parameters */
75 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
77 /* Return the board topology as defined in the board code */
78 return &board_topology_map;
81 int board_early_init_f(void)
83 #ifdef CONFIG_WATCHDOG
88 writel(0x00001111, MVEBU_MPP_BASE + 0x00);
89 writel(0x00000000, MVEBU_MPP_BASE + 0x04);
90 writel(0x55000000, MVEBU_MPP_BASE + 0x08);
91 writel(0x55550550, MVEBU_MPP_BASE + 0x0c);
92 writel(0x55555555, MVEBU_MPP_BASE + 0x10);
93 writel(0x00100565, MVEBU_MPP_BASE + 0x14);
94 writel(0x40000000, MVEBU_MPP_BASE + 0x18);
95 writel(0x00004444, MVEBU_MPP_BASE + 0x1c);
100 void spl_board_init(void)
102 #ifdef CONFIG_WATCHDOG
105 ret = uclass_get_device(UCLASS_WDT, 0, &watchdog_dev);
107 wdt_start(watchdog_dev, 120000, 0);
113 /* address of boot parameters */
114 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
117 mbus_dt_setup_win(&mbus_state, CONFIG_NVS_LOCATION, CONFIG_NVS_SIZE,
118 CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS1);
120 /* DEV_READYn is not needed for NVS, ignore it when accessing CS1 */
121 writel(0x00004001, MVEBU_DEV_BUS_BASE + 0xc8);
128 void arch_preboot_os(void)
130 #ifdef CONFIG_WATCHDOG
131 wdt_stop(watchdog_dev);
135 #ifdef CONFIG_WATCHDOG
136 void watchdog_reset(void)
138 static ulong next_reset = 0;
144 now = timer_get_us();
146 /* Do not reset the watchdog too often */
147 if (now > next_reset) {
148 wdt_reset(watchdog_dev);
149 next_reset = now + 1000;
154 static int led_7seg_init(unsigned int segments)
159 struct gpio_desc desc[8];
161 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
166 ret = gpio_request_list_by_name_nodev(offset_to_ofnode(node),
167 "segment-gpios", desc,
168 ARRAY_SIZE(desc), GPIOD_IS_OUT);
172 for (i = 0; i < ARRAY_SIZE(desc); i++) {
173 ret = dm_gpio_set_value(&desc[i], !(segments & BIT(i)));
181 #ifdef CONFIG_MISC_INIT_R
182 int misc_init_r(void)
184 static struct gpio_desc usb_en = {}, nand_wp = {}, phy_reset[2] = {},
187 gpio_hog(&usb_en, "atl,usb-enable", "enable-gpio", 1);
188 gpio_hog(&nand_wp, "atl,nand-protect", "protect-gpio", 1);
189 gpio_hog_list(phy_reset, ARRAY_SIZE(phy_reset), "atl,phy-reset", "reset-gpio", 0);
190 gpio_hog(&led_en, "atl,led-enable", "enable-gpio", 1);
192 #ifdef MTDPARTS_MTDOOPS
193 env_set("mtdoops", MTDPARTS_MTDOOPS);
202 #ifdef CONFIG_DISPLAY_BOARDINFO
205 puts("Board: " CONFIG_SYS_BOARD "\n");