board/Arcturus/ucp1020/ucp1020.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2013-2019 Arcturus Networks, Inc.
   4  *           https://www.arcturusnetworks.com/products/ucp1020/
   5  *           by Oleksandr G Zhadan et al.
   6  * based on board/freescale/p1_p2_rdb_pc/spl.c
   7  * original copyright follows:
   8  * Copyright 2013 Freescale Semiconductor, Inc.
   9  */
  10
  11 #include <common.h>
  12 #include <command.h>
  13 #include <env.h>
  14 #include <hwconfig.h>
  15 #include <init.h>
  16 #include <net.h>
  17 #include <pci.h>
  18 #include <i2c.h>
  19 #include <miiphy.h>
  20 #include <linux/libfdt.h>
  21 #include <fdt_support.h>
  22 #include <fsl_mdio.h>
  23 #include <tsec.h>
  24 #include <ioports.h>
  25 #include <netdev.h>
  26 #include <micrel.h>
  27 #include <spi_flash.h>
  28 #include <mmc.h>
  29 #include <linux/ctype.h>
  30 #include <asm/fsl_serdes.h>
  31 #include <asm/gpio.h>
  32 #include <asm/processor.h>
  33 #include <asm/mmu.h>
  34 #include <asm/cache.h>
  35 #include <asm/immap_85xx.h>
  36 #include <asm/fsl_pci.h>
  37 #include <fsl_ddr_sdram.h>
  38 #include <asm/io.h>
  39 #include <asm/fsl_law.h>
  40 #include <asm/fsl_lbc.h>
  41 #include <asm/mp.h>
  42 #include "ucp1020.h"
  43
  44 void spi_set_speed(struct spi_slave *slave, uint hz)
  45 {
  46         /* TO DO: It's actially have to be in spi/ */
  47 }
  48
  49 /*
  50  * To be compatible with cmd_gpio
  51  */
  52 int name_to_gpio(const char *name)
  53 {
  54         int gpio = 31 - simple_strtoul(name, NULL, 10);
  55
  56         if (gpio < 16)
  57                 gpio = -1;
  58
  59         return gpio;
  60 }
  61
  62 void board_gpio_init(void)
  63 {
  64         int i;
  65         char envname[8], *val;
  66
  67         for (i = 0; i < GPIO_MAX_NUM; i++) {
  68                 sprintf(envname, "GPIO%d", i);
  69                 val = env_get(envname);
  70                 if (val) {
  71                         char direction = toupper(val[0]);
  72                         char level = toupper(val[1]);
  73
  74                         if (direction == 'I') {
  75                                 gpio_direction_input(i);
  76                         } else {
  77                                 if (direction == 'O') {
  78                                         if (level == '1')
  79                                                 gpio_direction_output(i, 1);
  80                                         else
  81                                                 gpio_direction_output(i, 0);
  82                                 }
  83                         }
  84                 }
  85         }
  86
  87         val = env_get("PCIE_OFF");
  88         if (val) {
  89                 gpio_direction_input(GPIO_PCIE1_EN);
  90                 gpio_direction_input(GPIO_PCIE2_EN);
  91         } else {
  92                 gpio_direction_output(GPIO_PCIE1_EN, 1);
  93                 gpio_direction_output(GPIO_PCIE2_EN, 1);
  94         }
  95
  96         val = env_get("SDHC_CDWP_OFF");
  97         if (!val) {
  98                 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  99
 100                 setbits_be32(&gur->pmuxcr,
 101                              (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP));
 102         }
 103 }
 104
 105 int board_early_init_f(void)
 106 {
 107         return 0;       /* Just in case. Could be disable in config file */
 108 }
 109
 110 int checkboard(void)
 111 {
 112         printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL);
 113         board_gpio_init();
 114 #ifdef CONFIG_MMC
 115         printf("SD/MMC: 4-bit Mode\n");
 116 #endif
 117
 118         return 0;
 119 }
 120
 121 #ifdef CONFIG_PCI
 122 void pci_init_board(void)
 123 {
 124         fsl_pcie_init_board(0);
 125 }
 126 #endif
 127
 128 int board_early_init_r(void)
 129 {
 130         const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
 131         const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
 132
 133         /*
 134          * Remap Boot flash region to caching-inhibited
 135          * so that flash can be erased properly.
 136          */
 137
 138         /* Flush d-cache and invalidate i-cache of any FLASH data */
 139         flush_dcache();
 140         invalidate_icache();
 141
 142         /* invalidate existing TLB entry for flash */
 143         disable_tlb(flash_esel);
 144
 145         set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
 146                 MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, /* perms, wimge */
 147                 0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize, iprot */
 148
 149         return 0;
 150 }
 151
 152 int board_phy_config(struct phy_device *phydev)
 153 {
 154 #if defined(CONFIG_PHY_MICREL_KSZ9021)
 155         int regval;
 156         static int cnt;
 157
 158         if (cnt++ == 0)
 159                 printf("PHYs address [");
 160
 161         if (phydev->addr == TSEC1_PHY_ADDR || phydev->addr == TSEC3_PHY_ADDR) {
 162                 regval =
 163                     ksz9021_phy_extended_read(phydev,
 164                                               MII_KSZ9021_EXT_STRAP_STATUS);
 165                 /*
 166                  * min rx data delay
 167                  */
 168                 ksz9021_phy_extended_write(phydev,
 169                                            MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
 170                                            0x6666);
 171                 /*
 172                  * max rx/tx clock delay, min rx/tx control
 173                  */
 174                 ksz9021_phy_extended_write(phydev,
 175                                            MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
 176                                            0xf6f6);
 177                 printf("0x%x", (regval & 0x1f));
 178         } else {
 179                 printf("0x%x", (TSEC2_PHY_ADDR & 0x1f));
 180         }
 181         if (cnt == 3)
 182                 printf("] ");
 183         else
 184                 printf(",");
 185 #endif
 186
 187 #if defined(CONFIG_PHY_MICREL_KSZ9031_DEBUG)
 188         regval = ksz9031_phy_extended_read(phydev, 2, 0x01, 0x4000);
 189         if (regval >= 0)
 190                 printf(" (ADDR 0x%x) ", regval & 0x1f);
 191 #endif
 192
 193         return 0;
 194 }
 195
 196 int last_stage_init(void)
 197 {
 198         static char newkernelargs[256];
 199         static u8 id1[16];
 200         static u8 id2;
 201 #ifdef CONFIG_MMC
 202         struct mmc *mmc;
 203 #endif
 204         char *sval, *kval;
 205
 206         if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 7, 1, &id1[0], 2) < 0) {
 207                 printf("Error reading i2c IDT6V49205B information!\n");
 208         } else {
 209                 printf("IDT6V49205B(0x%02x): ready\n", id1[1]);
 210                 i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
 211                 if (!(id1[1] & 0x02)) {
 212                         id1[1] |= 0x02;
 213                         i2c_write(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
 214                         asm("nop; nop");
 215                 }
 216         }
 217
 218         if (i2c_read(CONFIG_SYS_I2C_NCT72_ADDR, 0xFE, 1, &id2, 1) < 0)
 219                 printf("Error reading i2c NCT72 information!\n");
 220         else
 221                 printf("NCT72(0x%x): ready\n", id2);
 222
 223         kval = env_get("kernelargs");
 224
 225 #ifdef CONFIG_MMC
 226         mmc = find_mmc_device(0);
 227         if (mmc)
 228                 if (!mmc_init(mmc)) {
 229                         printf("MMC/SD card detected\n");
 230                         if (kval) {
 231                                 int n = strlen(defkargs);
 232                                 char *tmp = strstr(kval, defkargs);
 233
 234                                 *tmp = 0;
 235                                 strcpy(newkernelargs, kval);
 236                                 strcat(newkernelargs, " ");
 237                                 strcat(newkernelargs, mmckargs);
 238                                 strcat(newkernelargs, " ");
 239                                 strcat(newkernelargs, &tmp[n]);
 240                                 env_set("kernelargs", newkernelargs);
 241                         } else {
 242                                 env_set("kernelargs", mmckargs);
 243                         }
 244                 }
 245 #endif
 246         get_arc_info();
 247
 248         if (kval) {
 249                 sval = env_get("SERIAL");
 250                 if (sval) {
 251                         strcpy(newkernelargs, "SN=");
 252                         strcat(newkernelargs, sval);
 253                         strcat(newkernelargs, " ");
 254                         strcat(newkernelargs, kval);
 255                         env_set("kernelargs", newkernelargs);
 256                 }
 257         } else {
 258                 printf("Error reading kernelargs env variable!\n");
 259         }
 260
 261         return 0;
 262 }
 263
 264 int board_eth_init(bd_t *bis)
 265 {
 266         struct fsl_pq_mdio_info mdio_info;
 267         struct tsec_info_struct tsec_info[4];
 268 #ifdef CONFIG_TSEC2
 269         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 270 #endif
 271         int num = 0;
 272
 273 #ifdef CONFIG_TSEC1
 274         SET_STD_TSEC_INFO(tsec_info[num], 1);
 275         num++;
 276 #endif
 277 #ifdef CONFIG_TSEC2
 278         SET_STD_TSEC_INFO(tsec_info[num], 2);
 279         if (is_serdes_configured(SGMII_TSEC2)) {
 280                 if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_SGMII2_DIS)) {
 281                         puts("eTSEC2 is in sgmii mode.\n");
 282                         tsec_info[num].flags |= TSEC_SGMII;
 283                         tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII;
 284                 }
 285         }
 286         num++;
 287 #endif
 288 #ifdef CONFIG_TSEC3
 289         SET_STD_TSEC_INFO(tsec_info[num], 3);
 290         num++;
 291 #endif
 292
 293         if (!num) {
 294                 printf("No TSECs initialized\n");
 295                 return 0;
 296         }
 297
 298         mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
 299         mdio_info.name = DEFAULT_MII_NAME;
 300
 301         fsl_pq_mdio_init(bis, &mdio_info);
 302
 303         tsec_eth_init(bis, tsec_info, num);
 304
 305         return pci_eth_init(bis);
 306 }
 307
 308 #ifdef CONFIG_OF_BOARD_SETUP
 309 int ft_board_setup(void *blob, bd_t *bd)
 310 {
 311         phys_addr_t base;
 312         phys_size_t size;
 313         const char *soc_usb_compat = "fsl-usb2-dr";
 314         int err, usb1_off, usb2_off;
 315
 316         ft_cpu_setup(blob, bd);
 317
 318         base = env_get_bootm_low();
 319         size = env_get_bootm_size();
 320
 321         fdt_fixup_memory(blob, (u64)base, (u64)size);
 322
 323         FT_FSL_PCI_SETUP;
 324
 325 #if defined(CONFIG_HAS_FSL_DR_USB)
 326         fsl_fdt_fixup_dr_usb(blob, bd);
 327 #endif
 328
 329 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 330         /* Delete eLBC node as it is muxed with USB2 controller */
 331         if (hwconfig("usb2")) {
 332                 const char *soc_elbc_compat = "fsl,p1020-elbc";
 333                 int off = fdt_node_offset_by_compatible(blob, -1,
 334                                                         soc_elbc_compat);
 335                 if (off < 0) {
 336                         printf
 337                             ("WARNING: could not find compatible node %s: %s\n",
 338                              soc_elbc_compat, fdt_strerror(off));
 339                         return off;
 340                 }
 341                 err = fdt_del_node(blob, off);
 342                 if (err < 0) {
 343                         printf("WARNING: could not remove %s: %s\n",
 344                                soc_elbc_compat, fdt_strerror(err));
 345                 }
 346                 return err;
 347         }
 348 #endif
 349
 350 /* Delete USB2 node as it is muxed with eLBC */
 351         usb1_off = fdt_node_offset_by_compatible(blob, -1, soc_usb_compat);
 352         if (usb1_off < 0) {
 353                 printf("WARNING: could not find compatible node %s: %s.\n",
 354                        soc_usb_compat, fdt_strerror(usb1_off));
 355                 return usb1_off;
 356         }
 357         usb2_off =
 358             fdt_node_offset_by_compatible(blob, usb1_off, soc_usb_compat);
 359         if (usb2_off < 0) {
 360                 printf("WARNING: could not find compatible node %s: %s.\n",
 361                        soc_usb_compat, fdt_strerror(usb2_off));
 362                 return usb2_off;
 363         }
 364         err = fdt_del_node(blob, usb2_off);
 365         if (err < 0) {
 366                 printf("WARNING: could not remove %s: %s.\n",
 367                        soc_usb_compat, fdt_strerror(err));
 368         }
 369         return 0;
 370 }
 371 #endif