board/Arcturus/ucp1020/ucp1020.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2013-2019 Arcturus Networks, Inc.
   4  *           https://www.arcturusnetworks.com/products/ucp1020/
   5  *           by Oleksandr G Zhadan et al.
   6  * based on board/freescale/p1_p2_rdb_pc/spl.c
   7  * original copyright follows:
   8  * Copyright 2013 Freescale Semiconductor, Inc.
   9  */
  10
  11 #include <common.h>
  12 #include <command.h>
  13 #include <env.h>
  14 #include <hwconfig.h>
  15 #include <pci.h>
  16 #include <i2c.h>
  17 #include <miiphy.h>
  18 #include <linux/libfdt.h>
  19 #include <fdt_support.h>
  20 #include <fsl_mdio.h>
  21 #include <tsec.h>
  22 #include <ioports.h>
  23 #include <netdev.h>
  24 #include <micrel.h>
  25 #include <spi_flash.h>
  26 #include <mmc.h>
  27 #include <linux/ctype.h>
  28 #include <asm/fsl_serdes.h>
  29 #include <asm/gpio.h>
  30 #include <asm/processor.h>
  31 #include <asm/mmu.h>
  32 #include <asm/cache.h>
  33 #include <asm/immap_85xx.h>
  34 #include <asm/fsl_pci.h>
  35 #include <fsl_ddr_sdram.h>
  36 #include <asm/io.h>
  37 #include <asm/fsl_law.h>
  38 #include <asm/fsl_lbc.h>
  39 #include <asm/mp.h>
  40 #include "ucp1020.h"
  41
  42 void spi_set_speed(struct spi_slave *slave, uint hz)
  43 {
  44         /* TO DO: It's actially have to be in spi/ */
  45 }
  46
  47 /*
  48  * To be compatible with cmd_gpio
  49  */
  50 int name_to_gpio(const char *name)
  51 {
  52         int gpio = 31 - simple_strtoul(name, NULL, 10);
  53
  54         if (gpio < 16)
  55                 gpio = -1;
  56
  57         return gpio;
  58 }
  59
  60 void board_gpio_init(void)
  61 {
  62         int i;
  63         char envname[8], *val;
  64
  65         for (i = 0; i < GPIO_MAX_NUM; i++) {
  66                 sprintf(envname, "GPIO%d", i);
  67                 val = env_get(envname);
  68                 if (val) {
  69                         char direction = toupper(val[0]);
  70                         char level = toupper(val[1]);
  71
  72                         if (direction == 'I') {
  73                                 gpio_direction_input(i);
  74                         } else {
  75                                 if (direction == 'O') {
  76                                         if (level == '1')
  77                                                 gpio_direction_output(i, 1);
  78                                         else
  79                                                 gpio_direction_output(i, 0);
  80                                 }
  81                         }
  82                 }
  83         }
  84
  85         val = env_get("PCIE_OFF");
  86         if (val) {
  87                 gpio_direction_input(GPIO_PCIE1_EN);
  88                 gpio_direction_input(GPIO_PCIE2_EN);
  89         } else {
  90                 gpio_direction_output(GPIO_PCIE1_EN, 1);
  91                 gpio_direction_output(GPIO_PCIE2_EN, 1);
  92         }
  93
  94         val = env_get("SDHC_CDWP_OFF");
  95         if (!val) {
  96                 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  97
  98                 setbits_be32(&gur->pmuxcr,
  99                              (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP));
 100         }
 101 }
 102
 103 int board_early_init_f(void)
 104 {
 105         return 0;       /* Just in case. Could be disable in config file */
 106 }
 107
 108 int checkboard(void)
 109 {
 110         printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL);
 111         board_gpio_init();
 112 #ifdef CONFIG_MMC
 113         printf("SD/MMC: 4-bit Mode\n");
 114 #endif
 115
 116         return 0;
 117 }
 118
 119 #ifdef CONFIG_PCI
 120 void pci_init_board(void)
 121 {
 122         fsl_pcie_init_board(0);
 123 }
 124 #endif
 125
 126 int board_early_init_r(void)
 127 {
 128         const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
 129         const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
 130
 131         /*
 132          * Remap Boot flash region to caching-inhibited
 133          * so that flash can be erased properly.
 134          */
 135
 136         /* Flush d-cache and invalidate i-cache of any FLASH data */
 137         flush_dcache();
 138         invalidate_icache();
 139
 140         /* invalidate existing TLB entry for flash */
 141         disable_tlb(flash_esel);
 142
 143         set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
 144                 MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, /* perms, wimge */
 145                 0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize, iprot */
 146
 147         return 0;
 148 }
 149
 150 int board_phy_config(struct phy_device *phydev)
 151 {
 152 #if defined(CONFIG_PHY_MICREL_KSZ9021)
 153         int regval;
 154         static int cnt;
 155
 156         if (cnt++ == 0)
 157                 printf("PHYs address [");
 158
 159         if (phydev->addr == TSEC1_PHY_ADDR || phydev->addr == TSEC3_PHY_ADDR) {
 160                 regval =
 161                     ksz9021_phy_extended_read(phydev,
 162                                               MII_KSZ9021_EXT_STRAP_STATUS);
 163                 /*
 164                  * min rx data delay
 165                  */
 166                 ksz9021_phy_extended_write(phydev,
 167                                            MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
 168                                            0x6666);
 169                 /*
 170                  * max rx/tx clock delay, min rx/tx control
 171                  */
 172                 ksz9021_phy_extended_write(phydev,
 173                                            MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
 174                                            0xf6f6);
 175                 printf("0x%x", (regval & 0x1f));
 176         } else {
 177                 printf("0x%x", (TSEC2_PHY_ADDR & 0x1f));
 178         }
 179         if (cnt == 3)
 180                 printf("] ");
 181         else
 182                 printf(",");
 183 #endif
 184
 185 #if defined(CONFIG_PHY_MICREL_KSZ9031_DEBUG)
 186         regval = ksz9031_phy_extended_read(phydev, 2, 0x01, 0x4000);
 187         if (regval >= 0)
 188                 printf(" (ADDR 0x%x) ", regval & 0x1f);
 189 #endif
 190
 191         return 0;
 192 }
 193
 194 int last_stage_init(void)
 195 {
 196         static char newkernelargs[256];
 197         static u8 id1[16];
 198         static u8 id2;
 199 #ifdef CONFIG_MMC
 200         struct mmc *mmc;
 201 #endif
 202         char *sval, *kval;
 203
 204         if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 7, 1, &id1[0], 2) < 0) {
 205                 printf("Error reading i2c IDT6V49205B information!\n");
 206         } else {
 207                 printf("IDT6V49205B(0x%02x): ready\n", id1[1]);
 208                 i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
 209                 if (!(id1[1] & 0x02)) {
 210                         id1[1] |= 0x02;
 211                         i2c_write(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
 212                         asm("nop; nop");
 213                 }
 214         }
 215
 216         if (i2c_read(CONFIG_SYS_I2C_NCT72_ADDR, 0xFE, 1, &id2, 1) < 0)
 217                 printf("Error reading i2c NCT72 information!\n");
 218         else
 219                 printf("NCT72(0x%x): ready\n", id2);
 220
 221         kval = env_get("kernelargs");
 222
 223 #ifdef CONFIG_MMC
 224         mmc = find_mmc_device(0);
 225         if (mmc)
 226                 if (!mmc_init(mmc)) {
 227                         printf("MMC/SD card detected\n");
 228                         if (kval) {
 229                                 int n = strlen(defkargs);
 230                                 char *tmp = strstr(kval, defkargs);
 231
 232                                 *tmp = 0;
 233                                 strcpy(newkernelargs, kval);
 234                                 strcat(newkernelargs, " ");
 235                                 strcat(newkernelargs, mmckargs);
 236                                 strcat(newkernelargs, " ");
 237                                 strcat(newkernelargs, &tmp[n]);
 238                                 env_set("kernelargs", newkernelargs);
 239                         } else {
 240                                 env_set("kernelargs", mmckargs);
 241                         }
 242                 }
 243 #endif
 244         get_arc_info();
 245
 246         if (kval) {
 247                 sval = env_get("SERIAL");
 248                 if (sval) {
 249                         strcpy(newkernelargs, "SN=");
 250                         strcat(newkernelargs, sval);
 251                         strcat(newkernelargs, " ");
 252                         strcat(newkernelargs, kval);
 253                         env_set("kernelargs", newkernelargs);
 254                 }
 255         } else {
 256                 printf("Error reading kernelargs env variable!\n");
 257         }
 258
 259         return 0;
 260 }
 261
 262 int board_eth_init(bd_t *bis)
 263 {
 264         struct fsl_pq_mdio_info mdio_info;
 265         struct tsec_info_struct tsec_info[4];
 266 #ifdef CONFIG_TSEC2
 267         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 268 #endif
 269         int num = 0;
 270
 271 #ifdef CONFIG_TSEC1
 272         SET_STD_TSEC_INFO(tsec_info[num], 1);
 273         num++;
 274 #endif
 275 #ifdef CONFIG_TSEC2
 276         SET_STD_TSEC_INFO(tsec_info[num], 2);
 277         if (is_serdes_configured(SGMII_TSEC2)) {
 278                 if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_SGMII2_DIS)) {
 279                         puts("eTSEC2 is in sgmii mode.\n");
 280                         tsec_info[num].flags |= TSEC_SGMII;
 281                         tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII;
 282                 }
 283         }
 284         num++;
 285 #endif
 286 #ifdef CONFIG_TSEC3
 287         SET_STD_TSEC_INFO(tsec_info[num], 3);
 288         num++;
 289 #endif
 290
 291         if (!num) {
 292                 printf("No TSECs initialized\n");
 293                 return 0;
 294         }
 295
 296         mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
 297         mdio_info.name = DEFAULT_MII_NAME;
 298
 299         fsl_pq_mdio_init(bis, &mdio_info);
 300
 301         tsec_eth_init(bis, tsec_info, num);
 302
 303         return pci_eth_init(bis);
 304 }
 305
 306 #ifdef CONFIG_OF_BOARD_SETUP
 307 int ft_board_setup(void *blob, bd_t *bd)
 308 {
 309         phys_addr_t base;
 310         phys_size_t size;
 311         const char *soc_usb_compat = "fsl-usb2-dr";
 312         int err, usb1_off, usb2_off;
 313
 314         ft_cpu_setup(blob, bd);
 315
 316         base = env_get_bootm_low();
 317         size = env_get_bootm_size();
 318
 319         fdt_fixup_memory(blob, (u64)base, (u64)size);
 320
 321         FT_FSL_PCI_SETUP;
 322
 323 #if defined(CONFIG_HAS_FSL_DR_USB)
 324         fsl_fdt_fixup_dr_usb(blob, bd);
 325 #endif
 326
 327 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 328         /* Delete eLBC node as it is muxed with USB2 controller */
 329         if (hwconfig("usb2")) {
 330                 const char *soc_elbc_compat = "fsl,p1020-elbc";
 331                 int off = fdt_node_offset_by_compatible(blob, -1,
 332                                                         soc_elbc_compat);
 333                 if (off < 0) {
 334                         printf
 335                             ("WARNING: could not find compatible node %s: %s\n",
 336                              soc_elbc_compat, fdt_strerror(off));
 337                         return off;
 338                 }
 339                 err = fdt_del_node(blob, off);
 340                 if (err < 0) {
 341                         printf("WARNING: could not remove %s: %s\n",
 342                                soc_elbc_compat, fdt_strerror(err));
 343                 }
 344                 return err;
 345         }
 346 #endif
 347
 348 /* Delete USB2 node as it is muxed with eLBC */
 349         usb1_off = fdt_node_offset_by_compatible(blob, -1, soc_usb_compat);
 350         if (usb1_off < 0) {
 351                 printf("WARNING: could not find compatible node %s: %s.\n",
 352                        soc_usb_compat, fdt_strerror(usb1_off));
 353                 return usb1_off;
 354         }
 355         usb2_off =
 356             fdt_node_offset_by_compatible(blob, usb1_off, soc_usb_compat);
 357         if (usb2_off < 0) {
 358                 printf("WARNING: could not find compatible node %s: %s.\n",
 359                        soc_usb_compat, fdt_strerror(usb2_off));
 360                 return usb2_off;
 361         }
 362         err = fdt_del_node(blob, usb2_off);
 363         if (err < 0) {
 364                 printf("WARNING: could not remove %s: %s.\n",
 365                        soc_usb_compat, fdt_strerror(err));
 366         }
 367         return 0;
 368 }
 369 #endif