board/Arcturus/ucp1020/ucp1020.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2013-2019 Arcturus Networks, Inc.
   4  *           https://www.arcturusnetworks.com/products/ucp1020/
   5  *           by Oleksandr G Zhadan et al.
   6  * based on board/freescale/p1_p2_rdb_pc/spl.c
   7  * original copyright follows:
   8  * Copyright 2013 Freescale Semiconductor, Inc.
   9  */
  10
  11 #include <common.h>
  12 #include <command.h>
  13 #include <hwconfig.h>
  14 #include <pci.h>
  15 #include <i2c.h>
  16 #include <miiphy.h>
  17 #include <linux/libfdt.h>
  18 #include <fdt_support.h>
  19 #include <fsl_mdio.h>
  20 #include <tsec.h>
  21 #include <ioports.h>
  22 #include <netdev.h>
  23 #include <micrel.h>
  24 #include <spi_flash.h>
  25 #include <mmc.h>
  26 #include <linux/ctype.h>
  27 #include <asm/fsl_serdes.h>
  28 #include <asm/gpio.h>
  29 #include <asm/processor.h>
  30 #include <asm/mmu.h>
  31 #include <asm/cache.h>
  32 #include <asm/immap_85xx.h>
  33 #include <asm/fsl_pci.h>
  34 #include <fsl_ddr_sdram.h>
  35 #include <asm/io.h>
  36 #include <asm/fsl_law.h>
  37 #include <asm/fsl_lbc.h>
  38 #include <asm/mp.h>
  39 #include "ucp1020.h"
  40
  41 void spi_set_speed(struct spi_slave *slave, uint hz)
  42 {
  43         /* TO DO: It's actially have to be in spi/ */
  44 }
  45
  46 /*
  47  * To be compatible with cmd_gpio
  48  */
  49 int name_to_gpio(const char *name)
  50 {
  51         int gpio = 31 - simple_strtoul(name, NULL, 10);
  52
  53         if (gpio < 16)
  54                 gpio = -1;
  55
  56         return gpio;
  57 }
  58
  59 void board_gpio_init(void)
  60 {
  61         int i;
  62         char envname[8], *val;
  63
  64         for (i = 0; i < GPIO_MAX_NUM; i++) {
  65                 sprintf(envname, "GPIO%d", i);
  66                 val = env_get(envname);
  67                 if (val) {
  68                         char direction = toupper(val[0]);
  69                         char level = toupper(val[1]);
  70
  71                         if (direction == 'I') {
  72                                 gpio_direction_input(i);
  73                         } else {
  74                                 if (direction == 'O') {
  75                                         if (level == '1')
  76                                                 gpio_direction_output(i, 1);
  77                                         else
  78                                                 gpio_direction_output(i, 0);
  79                                 }
  80                         }
  81                 }
  82         }
  83
  84         val = env_get("PCIE_OFF");
  85         if (val) {
  86                 gpio_direction_input(GPIO_PCIE1_EN);
  87                 gpio_direction_input(GPIO_PCIE2_EN);
  88         } else {
  89                 gpio_direction_output(GPIO_PCIE1_EN, 1);
  90                 gpio_direction_output(GPIO_PCIE2_EN, 1);
  91         }
  92
  93         val = env_get("SDHC_CDWP_OFF");
  94         if (!val) {
  95                 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  96
  97                 setbits_be32(&gur->pmuxcr,
  98                              (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP));
  99         }
 100 }
 101
 102 int board_early_init_f(void)
 103 {
 104         return 0;       /* Just in case. Could be disable in config file */
 105 }
 106
 107 int checkboard(void)
 108 {
 109         printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL);
 110         board_gpio_init();
 111 #ifdef CONFIG_MMC
 112         printf("SD/MMC: 4-bit Mode\n");
 113 #endif
 114
 115         return 0;
 116 }
 117
 118 #ifdef CONFIG_PCI
 119 void pci_init_board(void)
 120 {
 121         fsl_pcie_init_board(0);
 122 }
 123 #endif
 124
 125 int board_early_init_r(void)
 126 {
 127         const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
 128         const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
 129
 130         /*
 131          * Remap Boot flash region to caching-inhibited
 132          * so that flash can be erased properly.
 133          */
 134
 135         /* Flush d-cache and invalidate i-cache of any FLASH data */
 136         flush_dcache();
 137         invalidate_icache();
 138
 139         /* invalidate existing TLB entry for flash */
 140         disable_tlb(flash_esel);
 141
 142         set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
 143                 MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, /* perms, wimge */
 144                 0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize, iprot */
 145
 146         return 0;
 147 }
 148
 149 int board_phy_config(struct phy_device *phydev)
 150 {
 151 #if defined(CONFIG_PHY_MICREL_KSZ9021)
 152         int regval;
 153         static int cnt;
 154
 155         if (cnt++ == 0)
 156                 printf("PHYs address [");
 157
 158         if (phydev->addr == TSEC1_PHY_ADDR || phydev->addr == TSEC3_PHY_ADDR) {
 159                 regval =
 160                     ksz9021_phy_extended_read(phydev,
 161                                               MII_KSZ9021_EXT_STRAP_STATUS);
 162                 /*
 163                  * min rx data delay
 164                  */
 165                 ksz9021_phy_extended_write(phydev,
 166                                            MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
 167                                            0x6666);
 168                 /*
 169                  * max rx/tx clock delay, min rx/tx control
 170                  */
 171                 ksz9021_phy_extended_write(phydev,
 172                                            MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
 173                                            0xf6f6);
 174                 printf("0x%x", (regval & 0x1f));
 175         } else {
 176                 printf("0x%x", (TSEC2_PHY_ADDR & 0x1f));
 177         }
 178         if (cnt == 3)
 179                 printf("] ");
 180         else
 181                 printf(",");
 182 #endif
 183
 184 #if defined(CONFIG_PHY_MICREL_KSZ9031_DEBUG)
 185         regval = ksz9031_phy_extended_read(phydev, 2, 0x01, 0x4000);
 186         if (regval >= 0)
 187                 printf(" (ADDR 0x%x) ", regval & 0x1f);
 188 #endif
 189
 190         return 0;
 191 }
 192
 193 int last_stage_init(void)
 194 {
 195         static char newkernelargs[256];
 196         static u8 id1[16];
 197         static u8 id2;
 198 #ifdef CONFIG_MMC
 199         struct mmc *mmc;
 200 #endif
 201         char *sval, *kval;
 202
 203         if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 7, 1, &id1[0], 2) < 0) {
 204                 printf("Error reading i2c IDT6V49205B information!\n");
 205         } else {
 206                 printf("IDT6V49205B(0x%02x): ready\n", id1[1]);
 207                 i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
 208                 if (!(id1[1] & 0x02)) {
 209                         id1[1] |= 0x02;
 210                         i2c_write(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
 211                         asm("nop; nop");
 212                 }
 213         }
 214
 215         if (i2c_read(CONFIG_SYS_I2C_NCT72_ADDR, 0xFE, 1, &id2, 1) < 0)
 216                 printf("Error reading i2c NCT72 information!\n");
 217         else
 218                 printf("NCT72(0x%x): ready\n", id2);
 219
 220         kval = env_get("kernelargs");
 221
 222 #ifdef CONFIG_MMC
 223         mmc = find_mmc_device(0);
 224         if (mmc)
 225                 if (!mmc_init(mmc)) {
 226                         printf("MMC/SD card detected\n");
 227                         if (kval) {
 228                                 int n = strlen(defkargs);
 229                                 char *tmp = strstr(kval, defkargs);
 230
 231                                 *tmp = 0;
 232                                 strcpy(newkernelargs, kval);
 233                                 strcat(newkernelargs, " ");
 234                                 strcat(newkernelargs, mmckargs);
 235                                 strcat(newkernelargs, " ");
 236                                 strcat(newkernelargs, &tmp[n]);
 237                                 env_set("kernelargs", newkernelargs);
 238                         } else {
 239                                 env_set("kernelargs", mmckargs);
 240                         }
 241                 }
 242 #endif
 243         get_arc_info();
 244
 245         if (kval) {
 246                 sval = env_get("SERIAL");
 247                 if (sval) {
 248                         strcpy(newkernelargs, "SN=");
 249                         strcat(newkernelargs, sval);
 250                         strcat(newkernelargs, " ");
 251                         strcat(newkernelargs, kval);
 252                         env_set("kernelargs", newkernelargs);
 253                 }
 254         } else {
 255                 printf("Error reading kernelargs env variable!\n");
 256         }
 257
 258         return 0;
 259 }
 260
 261 int board_eth_init(bd_t *bis)
 262 {
 263         struct fsl_pq_mdio_info mdio_info;
 264         struct tsec_info_struct tsec_info[4];
 265 #ifdef CONFIG_TSEC2
 266         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 267 #endif
 268         int num = 0;
 269
 270 #ifdef CONFIG_TSEC1
 271         SET_STD_TSEC_INFO(tsec_info[num], 1);
 272         num++;
 273 #endif
 274 #ifdef CONFIG_TSEC2
 275         SET_STD_TSEC_INFO(tsec_info[num], 2);
 276         if (is_serdes_configured(SGMII_TSEC2)) {
 277                 if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_SGMII2_DIS)) {
 278                         puts("eTSEC2 is in sgmii mode.\n");
 279                         tsec_info[num].flags |= TSEC_SGMII;
 280                         tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII;
 281                 }
 282         }
 283         num++;
 284 #endif
 285 #ifdef CONFIG_TSEC3
 286         SET_STD_TSEC_INFO(tsec_info[num], 3);
 287         num++;
 288 #endif
 289
 290         if (!num) {
 291                 printf("No TSECs initialized\n");
 292                 return 0;
 293         }
 294
 295         mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
 296         mdio_info.name = DEFAULT_MII_NAME;
 297
 298         fsl_pq_mdio_init(bis, &mdio_info);
 299
 300         tsec_eth_init(bis, tsec_info, num);
 301
 302         return pci_eth_init(bis);
 303 }
 304
 305 #ifdef CONFIG_OF_BOARD_SETUP
 306 int ft_board_setup(void *blob, bd_t *bd)
 307 {
 308         phys_addr_t base;
 309         phys_size_t size;
 310         const char *soc_usb_compat = "fsl-usb2-dr";
 311         int err, usb1_off, usb2_off;
 312
 313         ft_cpu_setup(blob, bd);
 314
 315         base = env_get_bootm_low();
 316         size = env_get_bootm_size();
 317
 318         fdt_fixup_memory(blob, (u64)base, (u64)size);
 319
 320         FT_FSL_PCI_SETUP;
 321
 322 #if defined(CONFIG_HAS_FSL_DR_USB)
 323         fsl_fdt_fixup_dr_usb(blob, bd);
 324 #endif
 325
 326 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 327         /* Delete eLBC node as it is muxed with USB2 controller */
 328         if (hwconfig("usb2")) {
 329                 const char *soc_elbc_compat = "fsl,p1020-elbc";
 330                 int off = fdt_node_offset_by_compatible(blob, -1,
 331                                                         soc_elbc_compat);
 332                 if (off < 0) {
 333                         printf
 334                             ("WARNING: could not find compatible node %s: %s\n",
 335                              soc_elbc_compat, fdt_strerror(off));
 336                         return off;
 337                 }
 338                 err = fdt_del_node(blob, off);
 339                 if (err < 0) {
 340                         printf("WARNING: could not remove %s: %s\n",
 341                                soc_elbc_compat, fdt_strerror(err));
 342                 }
 343                 return err;
 344         }
 345 #endif
 346
 347 /* Delete USB2 node as it is muxed with eLBC */
 348         usb1_off = fdt_node_offset_by_compatible(blob, -1, soc_usb_compat);
 349         if (usb1_off < 0) {
 350                 printf("WARNING: could not find compatible node %s: %s.\n",
 351                        soc_usb_compat, fdt_strerror(usb1_off));
 352                 return usb1_off;
 353         }
 354         usb2_off =
 355             fdt_node_offset_by_compatible(blob, usb1_off, soc_usb_compat);
 356         if (usb2_off < 0) {
 357                 printf("WARNING: could not find compatible node %s: %s.\n",
 358                        soc_usb_compat, fdt_strerror(usb2_off));
 359                 return usb2_off;
 360         }
 361         err = fdt_del_node(blob, usb2_off);
 362         if (err < 0) {
 363                 printf("WARNING: could not remove %s: %s.\n",
 364                        soc_usb_compat, fdt_strerror(err));
 365         }
 366         return 0;
 367 }
 368 #endif