arch/x86/lib/fsp2/fsp_dram.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2019 Google LLC
   4  * Written by Simon Glass <sjg@chromium.org>
   5  */
   6
   7 #include <common.h>
   8 #include <handoff.h>
   9 #include <init.h>
  10 #include <log.h>
  11 #include <spl.h>
  12 #include <acpi/acpi_s3.h>
  13 #include <asm/arch/cpu.h>
  14 #include <asm/fsp/fsp_support.h>
  15 #include <asm/fsp2/fsp_api.h>
  16 #include <asm/fsp2/fsp_internal.h>
  17 #include <linux/sizes.h>
  18
  19 int dram_init(void)
  20 {
  21         int ret;
  22
  23         if (!ll_boot_init()) {
  24                 /* Use a small and safe amount of 1GB */
  25                 gd->ram_size = SZ_1G;
  26
  27                 return 0;
  28         }
  29         if (spl_phase() == PHASE_SPL) {
  30 #ifdef CONFIG_HAVE_ACPI_RESUME
  31                 bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
  32 #else
  33                 bool s3wake = false;
  34 #endif
  35
  36                 ret = fsp_memory_init(s3wake,
  37                               IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH));
  38                 if (ret) {
  39                         debug("Memory init failed (err=%x)\n", ret);
  40                         return ret;
  41                 }
  42
  43                 /* The FSP has already set up DRAM, so grab the info we need */
  44                 ret = fsp_scan_for_ram_size();
  45                 if (ret)
  46                         return ret;
  47
  48 #ifdef CONFIG_ENABLE_MRC_CACHE
  49                 gd->arch.mrc[MRC_TYPE_NORMAL].buf =
  50                         fsp_get_nvs_data(gd->arch.hob_list,
  51                                          &gd->arch.mrc[MRC_TYPE_NORMAL].len);
  52                 gd->arch.mrc[MRC_TYPE_VAR].buf =
  53                         fsp_get_var_nvs_data(gd->arch.hob_list,
  54                                              &gd->arch.mrc[MRC_TYPE_VAR].len);
  55                 log_debug("normal %x, var %x\n",
  56                           gd->arch.mrc[MRC_TYPE_NORMAL].len,
  57                           gd->arch.mrc[MRC_TYPE_VAR].len);
  58 #endif
  59         } else {
  60 #if CONFIG_IS_ENABLED(HANDOFF)
  61                 struct spl_handoff *ho = gd->spl_handoff;
  62
  63                 if (!ho) {
  64                         debug("No SPL handoff found\n");
  65                         return -ESTRPIPE;
  66                 }
  67                 gd->ram_size = ho->ram_size;
  68                 handoff_load_dram_banks(ho);
  69 #endif
  70                 ret = arch_fsps_preinit();
  71                 if (ret)
  72                         return log_msg_ret("fsp_s_preinit", ret);
  73         }
  74
  75         return 0;
  76 }
  77
  78 ulong board_get_usable_ram_top(ulong total_size)
  79 {
  80         if (!ll_boot_init())
  81                 return gd->ram_size;
  82
  83 #if CONFIG_IS_ENABLED(HANDOFF)
  84         struct spl_handoff *ho = gd->spl_handoff;
  85
  86         return ho->arch.usable_ram_top;
  87 #endif
  88
  89         return gd->ram_top;
  90 }