arch/x86/lib/fsp2/fsp_dram.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2019 Google LLC
   4  * Written by Simon Glass <sjg@chromium.org>
   5  */
   6
   7 #include <common.h>
   8 #include <handoff.h>
   9 #include <spl.h>
  10 #include <acpi/acpi_s3.h>
  11 #include <asm/arch/cpu.h>
  12 #include <asm/fsp/fsp_support.h>
  13 #include <asm/fsp2/fsp_api.h>
  14 #include <asm/fsp2/fsp_internal.h>
  15 #include <linux/sizes.h>
  16
  17 int dram_init(void)
  18 {
  19         int ret;
  20
  21         if (!ll_boot_init()) {
  22                 /* Use a small and safe amount of 1GB */
  23                 gd->ram_size = SZ_1G;
  24
  25                 return 0;
  26         }
  27         if (spl_phase() == PHASE_SPL) {
  28 #ifdef CONFIG_HAVE_ACPI_RESUME
  29                 bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
  30 #else
  31                 bool s3wake = false;
  32 #endif
  33
  34                 ret = fsp_memory_init(s3wake,
  35                               IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH));
  36                 if (ret) {
  37                         debug("Memory init failed (err=%x)\n", ret);
  38                         return ret;
  39                 }
  40
  41                 /* The FSP has already set up DRAM, so grab the info we need */
  42                 ret = fsp_scan_for_ram_size();
  43                 if (ret)
  44                         return ret;
  45
  46 #ifdef CONFIG_ENABLE_MRC_CACHE
  47                 gd->arch.mrc[MRC_TYPE_NORMAL].buf =
  48                         fsp_get_nvs_data(gd->arch.hob_list,
  49                                          &gd->arch.mrc[MRC_TYPE_NORMAL].len);
  50                 gd->arch.mrc[MRC_TYPE_VAR].buf =
  51                         fsp_get_var_nvs_data(gd->arch.hob_list,
  52                                              &gd->arch.mrc[MRC_TYPE_VAR].len);
  53                 log_debug("normal %x, var %x\n",
  54                           gd->arch.mrc[MRC_TYPE_NORMAL].len,
  55                           gd->arch.mrc[MRC_TYPE_VAR].len);
  56 #endif
  57         } else {
  58 #if CONFIG_IS_ENABLED(HANDOFF)
  59                 struct spl_handoff *ho = gd->spl_handoff;
  60
  61                 if (!ho) {
  62                         debug("No SPL handoff found\n");
  63                         return -ESTRPIPE;
  64                 }
  65                 gd->ram_size = ho->ram_size;
  66                 handoff_load_dram_banks(ho);
  67 #endif
  68                 ret = arch_fsps_preinit();
  69                 if (ret)
  70                         return log_msg_ret("fsp_s_preinit", ret);
  71         }
  72
  73         return 0;
  74 }
  75
  76 ulong board_get_usable_ram_top(ulong total_size)
  77 {
  78         if (!ll_boot_init())
  79                 return gd->ram_size;
  80
  81 #if CONFIG_IS_ENABLED(HANDOFF)
  82         struct spl_handoff *ho = gd->spl_handoff;
  83
  84         return ho->arch.usable_ram_top;
  85 #endif
  86
  87         return gd->ram_top;
  88 }