1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2013 Google Inc.
4 * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
6 * Modified from coreboot src/soc/intel/baytrail/acpi/southcluster.asl
11 Name(_HID, EISAID("PNP0A08")) /* PCIe */
12 Name(_CID, EISAID("PNP0A03")) /* PCI */
17 Name(MCRS, ResourceTemplate()
20 WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
21 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
24 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
25 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
27 /* PCI Config Space */
28 IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
31 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
32 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
34 /* VGA memory (0xa0000-0xbffff) */
35 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
37 0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
40 /* OPROM reserved (0xc0000-0xc3fff) */
41 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
43 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
46 /* OPROM reserved (0xc4000-0xc7fff) */
47 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
49 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
52 /* OPROM reserved (0xc8000-0xcbfff) */
53 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
55 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
58 /* OPROM reserved (0xcc000-0xcffff) */
59 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
61 0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
64 /* OPROM reserved (0xd0000-0xd3fff) */
65 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
67 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
70 /* OPROM reserved (0xd4000-0xd7fff) */
71 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
73 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
76 /* OPROM reserved (0xd8000-0xdbfff) */
77 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
79 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
82 /* OPROM reserved (0xdc000-0xdffff) */
83 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
85 0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
88 /* BIOS Extension (0xe0000-0xe3fff) */
89 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
91 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
94 /* BIOS Extension (0xe4000-0xe7fff) */
95 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
97 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
100 /* BIOS Extension (0xe8000-0xebfff) */
101 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
102 Cacheable, ReadWrite,
103 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
104 0x00004000, , , ESG2)
106 /* BIOS Extension (0xec000-0xeffff) */
107 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
108 Cacheable, ReadWrite,
109 0x00000000, 0x000ec000, 0x000effff, 0x00000000,
110 0x00004000, , , ESG3)
112 /* System BIOS (0xf0000-0xfffff) */
113 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
114 Cacheable, ReadWrite,
115 0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
116 0x00010000, , , FSEG)
118 /* PCI Memory Region (TOLM-CONFIG_MMCONF_BASE_ADDRESS) */
119 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
120 Cacheable, ReadWrite,
121 0x00000000, 0x00000000, 0x00000000, 0x00000000,
122 0x00000000, , , PMEM)
124 /* High PCI Memory Region */
125 QwordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
126 Cacheable, ReadWrite,
127 0x00000000, 0x00000000, 0x00000000, 0x00000000,
128 0x00000000, , , UMEM)
131 Method(_CRS, 0, Serialized)
133 /* Update PCI resource area */
134 CreateDwordField(MCRS, ^PMEM._MIN, PMIN)
135 CreateDwordField(MCRS, ^PMEM._MAX, PMAX)
136 CreateDwordField(MCRS, ^PMEM._LEN, PLEN)
139 * Hardcode TOLM to 2GB for now as BayTrail FSP uses this value.
141 * TODO: for generic usage, read TOLM value from register, or
142 * from global NVS (not implemented by U-Boot yet).
144 Store(0x80000000, PMIN)
145 Store(Subtract(MCFG_BASE_ADDRESS, 1), PMAX)
146 Add(Subtract(PMAX, PMIN), 1, PLEN)
148 /* Update High PCI resource area */
149 CreateQwordField(MCRS, ^UMEM._MIN, UMIN)
150 CreateQwordField(MCRS, ^UMEM._MAX, UMAX)
151 CreateQwordField(MCRS, ^UMEM._LEN, ULEN)
153 /* Set base address to 16GB and allocate 48GB for PCI space */
154 Store(0x400000000, UMIN)
155 Store(0xc00000000, ULEN)
156 Add(UMIN, Subtract(ULEN, 1), UMAX)
161 /* Device Resource Consumption */
164 Name(_HID, EISAID("PNP0C02"))
167 Name(PDRS, ResourceTemplate() {
168 Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE)
169 Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE)
170 Memory32Fixed(ReadWrite, SPI_BASE_ADDRESS, SPI_BASE_SIZE)
171 Memory32Fixed(ReadWrite, PMC_BASE_ADDRESS, PMC_BASE_SIZE)
172 Memory32Fixed(ReadWrite, PUNIT_BASE_ADDRESS, PUNIT_BASE_SIZE)
173 Memory32Fixed(ReadWrite, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
174 Memory32Fixed(ReadWrite, RCBA_BASE_ADDRESS, RCBA_BASE_SIZE)
175 Memory32Fixed(ReadWrite, MPHY_BASE_ADDRESS, MPHY_BASE_SIZE)
178 /* Current Resource Settings */
179 Method(_CRS, 0, Serialized)
187 /* Check for proper GUID */
188 If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
189 /* Let OS control everything */
192 /* Unrecognized UUID */
193 CreateDWordField(Arg3, 0, CDW1)
199 /* LPC Bridge 0:1f.0 */
202 /* USB EHCI 0:1d.0 */
205 /* USB XHCI 0:14.0 */
208 /* IRQ routing for each PCI device */
209 #include <asm/acpi/irqroute.asl>