1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014 Google, Inc
4 * Copyright (C) 2000 Ronald G. Minnich
6 * Microcode update for Intel PIII and later CPUs
13 #include <linux/libfdt.h>
15 #include <asm/microcode.h>
17 #include <asm/msr-index.h>
18 #include <asm/processor.h>
20 DECLARE_GLOBAL_DATA_PTR;
23 * struct microcode_update - standard microcode header from Intel
25 * We read this information out of the device tree and use it to determine
26 * whether the update is applicable or not. We also use the same structure
27 * to read information from the CPU.
29 struct microcode_update {
33 uint processor_signature;
41 static int microcode_decode_node(const void *blob, int node,
42 struct microcode_update *update)
44 update->data = fdt_getprop(blob, node, "data", &update->size);
48 update->header_version = fdtdec_get_int(blob, node,
49 "intel,header-version", 0);
50 update->update_revision = fdtdec_get_int(blob, node,
51 "intel,update-revision", 0);
52 update->date_code = fdtdec_get_int(blob, node,
53 "intel,date-code", 0);
54 update->processor_signature = fdtdec_get_int(blob, node,
55 "intel,processor-signature", 0);
56 update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
57 update->loader_revision = fdtdec_get_int(blob, node,
58 "intel,loader-revision", 0);
59 update->processor_flags = fdtdec_get_int(blob, node,
60 "intel,processor-flags", 0);
65 int microcode_read_rev(void)
67 /* Quark does not have microcode MSRs */
68 #ifdef CONFIG_INTEL_QUARK
72 * Some Intel CPUs can be very finicky about the CPUID sequence used.
73 * So this is implemented in assembly so that it works reliably.
87 "=a" (low), "=d" (high)
89 "i" (MSR_IA32_UCODE_REV)
98 static void microcode_read_cpu(struct microcode_update *cpu)
100 /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
101 unsigned int x86_model, x86_family;
102 struct cpuid_result result;
105 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
107 rdmsr(MSR_IA32_UCODE_REV, low, cpu->update_revision);
108 x86_model = (result.eax >> 4) & 0x0f;
109 x86_family = (result.eax >> 8) & 0x0f;
110 cpu->processor_signature = result.eax;
112 cpu->processor_flags = 0;
113 if ((x86_model >= 5) || (x86_family > 6)) {
114 rdmsr(0x17, low, high);
115 cpu->processor_flags = 1 << ((high >> 18) & 7);
117 debug("microcode: sig=%#x pf=%#x revision=%#x\n",
118 cpu->processor_signature, cpu->processor_flags,
119 cpu->update_revision);
122 /* Get a microcode update from the device tree and apply it */
123 int microcode_update_intel(void)
125 struct microcode_update cpu, update;
127 const void *blob = gd->fdt_blob;
134 microcode_read_cpu(&cpu);
139 node = fdtdec_next_compatible(blob, node,
140 COMPAT_INTEL_MICROCODE);
142 debug("%s: Found %d updates\n", __func__, count);
143 return count ? 0 : skipped ? -EEXIST : -ENOENT;
146 ret = microcode_decode_node(blob, node, &update);
147 if (ret == -ENOENT && ucode_base) {
149 * The microcode has been removed from the device tree
150 * in the build system. In that case it will have
151 * already been updated in car_init().
153 debug("%s: Microcode data not available\n", __func__);
158 debug("%s: Unable to decode update: %d\n", __func__,
162 if (!(update.processor_signature == cpu.processor_signature &&
163 (update.processor_flags & cpu.processor_flags))) {
164 debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
165 __func__, update.processor_signature,
166 update.processor_flags);
170 address = (ulong)update.data + UCODE_HEADER_LEN;
171 wrmsr(MSR_IA32_UCODE_WRITE, address, 0);
172 rev = microcode_read_rev();
173 debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
174 rev, update.date_code & 0xffff,
175 (update.date_code >> 24) & 0xff,
176 (update.date_code >> 16) & 0xff);
177 if (update.update_revision != rev) {
178 printf("Microcode update failed\n");
183 ucode_base = (ulong)update.data;
184 ucode_size = update.size;