arch/x86/cpu/baytrail/fsp_configs.c

   1 /*
   2  * Copyright (C) 2013, Intel Corporation
   3  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
   4  * Copyright (C) 2015, Kodak Alaris, Inc
   5  *
   6  * SPDX-License-Identifier:     Intel
   7  */
   8
   9 #include <common.h>
  10 #include <fdtdec.h>
  11 #include <asm/arch/fsp/azalia.h>
  12 #include <asm/fsp/fsp_support.h>
  13
  14 DECLARE_GLOBAL_DATA_PTR;
  15
  16 /* ALC262 Verb Table - 10EC0262 */
  17 static const uint32_t verb_table_data13[] = {
  18         /* Pin Complex (NID 0x11) */
  19         0x01171cf0,
  20         0x01171d11,
  21         0x01171e11,
  22         0x01171f41,
  23         /* Pin Complex (NID 0x12) */
  24         0x01271cf0,
  25         0x01271d11,
  26         0x01271e11,
  27         0x01271f41,
  28         /* Pin Complex (NID 0x14) */
  29         0x01471c10,
  30         0x01471d40,
  31         0x01471e01,
  32         0x01471f01,
  33         /* Pin Complex (NID 0x15) */
  34         0x01571cf0,
  35         0x01571d11,
  36         0x01571e11,
  37         0x01571f41,
  38         /* Pin Complex (NID 0x16) */
  39         0x01671cf0,
  40         0x01671d11,
  41         0x01671e11,
  42         0x01671f41,
  43         /* Pin Complex (NID 0x18) */
  44         0x01871c20,
  45         0x01871d98,
  46         0x01871ea1,
  47         0x01871f01,
  48         /* Pin Complex (NID 0x19) */
  49         0x01971c21,
  50         0x01971d98,
  51         0x01971ea1,
  52         0x01971f02,
  53         /* Pin Complex (NID 0x1A) */
  54         0x01a71c2f,
  55         0x01a71d30,
  56         0x01a71e81,
  57         0x01a71f01,
  58         /* Pin Complex */
  59         0x01b71c1f,
  60         0x01b71d40,
  61         0x01b71e21,
  62         0x01b71f02,
  63         /* Pin Complex */
  64         0x01c71cf0,
  65         0x01c71d11,
  66         0x01c71e11,
  67         0x01c71f41,
  68         /* Pin Complex */
  69         0x01d71c01,
  70         0x01d71dc6,
  71         0x01d71e14,
  72         0x01d71f40,
  73         /* Pin Complex */
  74         0x01e71cf0,
  75         0x01e71d11,
  76         0x01e71e11,
  77         0x01e71f41,
  78         /* Pin Complex */
  79         0x01f71cf0,
  80         0x01f71d11,
  81         0x01f71e11,
  82         0x01f71f41,
  83 };
  84
  85 /*
  86  * This needs to be in ROM since if we put it in CAR, FSP init loses it when
  87  * it drops CAR.
  88  *
  89  * TODO(sjg@chromium.org): Move to device tree when FSP allows it
  90  *
  91  * VerbTable: (RealTek ALC262)
  92  * Revision ID = 0xFF, support all steps
  93  * Codec Verb Table For AZALIA
  94  * Codec Address: CAd value (0/1/2)
  95  * Codec Vendor: 0x10EC0262
  96  */
  97 static const struct pch_azalia_verb_table azalia_verb_table[] = {
  98         {
  99                 {
 100                         0x10ec0262,
 101                         0x0000,
 102                         0xff,
 103                         0x01,
 104                         0x000b,
 105                         0x0002,
 106                 },
 107                 verb_table_data13
 108         }
 109 };
 110
 111 const struct pch_azalia_config azalia_config = {
 112         .pme_enable = 1,
 113         .docking_supported = 1,
 114         .docking_attached = 0,
 115         .hdmi_codec_enable = 1,
 116         .azalia_v_ci_enable = 1,
 117         .rsvdbits = 0,
 118         .azalia_verb_table_num = 1,
 119         .azalia_verb_table = azalia_verb_table,
 120         .reset_wait_timer_us = 300
 121 };
 122
 123 /**
 124  * Override the FSP's configuration data.
 125  * If the device tree does not specify an integer setting, use the default
 126  * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file.
 127  */
 128 void update_fsp_configs(struct fsp_config_data *config,
 129                         struct fspinit_rtbuf *rt_buf)
 130 {
 131         struct upd_region *fsp_upd = &config->fsp_upd;
 132         struct memory_down_data *mem;
 133         const void *blob = gd->fdt_blob;
 134         int node;
 135
 136         /* Initialize runtime buffer for fsp_init() */
 137         rt_buf->common.stack_top = config->common.stack_top - 32;
 138         rt_buf->common.boot_mode = config->common.boot_mode;
 139         rt_buf->common.upd_data = &config->fsp_upd;
 140
 141         fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config;
 142
 143         node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
 144         if (node < 0) {
 145                 debug("%s: Cannot find FSP node\n", __func__);
 146                 return;
 147         }
 148
 149         fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node,
 150                                                      "fsp,mrc-init-tseg-size",
 151                                                      MRC_INIT_TSEG_SIZE_1MB);
 152         fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node,
 153                                                      "fsp,mrc-init-mmio-size",
 154                                                      MRC_INIT_MMIO_SIZE_2048MB);
 155         fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node,
 156                                                      "fsp,mrc-init-spd-addr1",
 157                                                      0xa0);
 158         fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node,
 159                                                      "fsp,mrc-init-spd-addr2",
 160                                                      0xa2);
 161         fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node,
 162                                                  "fsp,emmc-boot-mode",
 163                                                  EMMC_BOOT_MODE_EMMC41);
 164         fsp_upd->enable_sdio = fdtdec_get_bool(blob, node, "fsp,enable-sdio");
 165         fsp_upd->enable_sdcard = fdtdec_get_bool(blob, node,
 166                                                  "fsp,enable-sdcard");
 167         fsp_upd->enable_hsuart0 = fdtdec_get_bool(blob, node,
 168                                                   "fsp,enable-hsuart0");
 169         fsp_upd->enable_hsuart1 = fdtdec_get_bool(blob, node,
 170                                                   "fsp,enable-hsuart1");
 171         fsp_upd->enable_spi = fdtdec_get_bool(blob, node, "fsp,enable-spi");
 172         fsp_upd->enable_sata = fdtdec_get_bool(blob, node, "fsp,enable-sata");
 173         fsp_upd->sata_mode = fdtdec_get_int(blob, node, "fsp,sata-mode",
 174                                             SATA_MODE_AHCI);
 175         fsp_upd->enable_azalia = fdtdec_get_bool(blob, node,
 176                                                  "fsp,enable-azalia");
 177         fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci");
 178         fsp_upd->lpe_mode = fdtdec_get_int(blob, node, "fsp,lpe-mode",
 179                                            LPE_MODE_PCI);
 180         fsp_upd->lpss_sio_mode = fdtdec_get_int(blob, node, "fsp,lpss-sio-mode",
 181                                            LPSS_SIO_MODE_PCI);
 182         fsp_upd->enable_dma0 = fdtdec_get_bool(blob, node, "fsp,enable-dma0");
 183         fsp_upd->enable_dma1 = fdtdec_get_bool(blob, node, "fsp,enable-dma1");
 184         fsp_upd->enable_i2_c0 = fdtdec_get_bool(blob, node, "fsp,enable-i2c0");
 185         fsp_upd->enable_i2_c1 = fdtdec_get_bool(blob, node, "fsp,enable-i2c1");
 186         fsp_upd->enable_i2_c2 = fdtdec_get_bool(blob, node, "fsp,enable-i2c2");
 187         fsp_upd->enable_i2_c3 = fdtdec_get_bool(blob, node, "fsp,enable-i2c3");
 188         fsp_upd->enable_i2_c4 = fdtdec_get_bool(blob, node, "fsp,enable-i2c4");
 189         fsp_upd->enable_i2_c5 = fdtdec_get_bool(blob, node, "fsp,enable-i2c5");
 190         fsp_upd->enable_i2_c6 = fdtdec_get_bool(blob, node, "fsp,enable-i2c6");
 191         fsp_upd->enable_pwm0 = fdtdec_get_bool(blob, node, "fsp,enable-pwm0");
 192         fsp_upd->enable_pwm1 = fdtdec_get_bool(blob, node, "fsp,enable-pwm1");
 193         fsp_upd->enable_hsi = fdtdec_get_bool(blob, node, "fsp,enable-hsi");
 194         fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node,
 195                         "fsp,igd-dvmt50-pre-alloc", IGD_DVMT50_PRE_ALLOC_64MB);
 196         fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size",
 197                                                 APERTURE_SIZE_256MB);
 198         fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size",
 199                                            GTT_SIZE_2MB);
 200         fsp_upd->mrc_debug_msg = fdtdec_get_bool(blob, node,
 201                                                  "fsp,mrc-debug-msg");
 202         fsp_upd->isp_enable = fdtdec_get_bool(blob, node, "fsp,isp-enable");
 203         fsp_upd->scc_mode = fdtdec_get_int(blob, node, "fsp,scc-mode",
 204                                            SCC_MODE_PCI);
 205         fsp_upd->igd_render_standby = fdtdec_get_bool(blob, node,
 206                                                       "fsp,igd-render-standby");
 207         fsp_upd->txe_uma_enable = fdtdec_get_bool(blob, node,
 208                                                   "fsp,txe-uma-enable");
 209         fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection",
 210                                                OS_SELECTION_LINUX);
 211         fsp_upd->emmc45_ddr50_enabled = fdtdec_get_bool(blob, node,
 212                         "fsp,emmc45-ddr50-enabled");
 213         fsp_upd->emmc45_hs200_enabled = fdtdec_get_bool(blob, node,
 214                         "fsp,emmc45-hs200-enabled");
 215         fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node,
 216                         "fsp,emmc45-retune-timer-value", 8);
 217         fsp_upd->enable_igd = fdtdec_get_bool(blob, node, "fsp,enable-igd");
 218
 219         mem = &fsp_upd->memory_params;
 220         mem->enable_memory_down = fdtdec_get_bool(blob, node,
 221                                                   "fsp,enable-memory-down");
 222         if (mem->enable_memory_down) {
 223                 node = fdtdec_next_compatible(blob, node,
 224                                               COMPAT_INTEL_BAYTRAIL_FSP_MDP);
 225                 if (node < 0) {
 226                         debug("%s: Cannot find FSP memory-down-params node\n",
 227                               __func__);
 228                 } else {
 229                         mem->dram_speed = fdtdec_get_int(blob, node,
 230                                                          "fsp,dram-speed",
 231                                                          DRAM_SPEED_1333MTS);
 232                         mem->dram_type = fdtdec_get_int(blob, node,
 233                                                         "fsp,dram-type",
 234                                                         DRAM_TYPE_DDR3L);
 235                         mem->dimm_0_enable = fdtdec_get_bool(blob, node,
 236                                         "fsp,dimm-0-enable");
 237                         mem->dimm_1_enable = fdtdec_get_bool(blob, node,
 238                                         "fsp,dimm-1-enable");
 239                         mem->dimm_width = fdtdec_get_int(blob, node,
 240                                                          "fsp,dimm-width",
 241                                                          DIMM_WIDTH_X8);
 242                         mem->dimm_density = fdtdec_get_int(blob, node,
 243                                                            "fsp,dimm-density",
 244                                                            DIMM_DENSITY_2GBIT);
 245                         mem->dimm_bus_width = fdtdec_get_int(blob, node,
 246                                         "fsp,dimm-bus-width",
 247                                         DIMM_BUS_WIDTH_64BITS);
 248                         mem->dimm_sides = fdtdec_get_int(blob, node,
 249                                                          "fsp,dimm-sides",
 250                                                          DIMM_SIDES_1RANKS);
 251                         mem->dimm_tcl = fdtdec_get_int(blob, node,
 252                                                        "fsp,dimm-tcl", 0x09);
 253                         mem->dimm_trpt_rcd = fdtdec_get_int(blob, node,
 254                                         "fsp,dimm-trpt-rcd", 0x09);
 255                         mem->dimm_twr = fdtdec_get_int(blob, node,
 256                                                        "fsp,dimm-twr", 0x0a);
 257                         mem->dimm_twtr = fdtdec_get_int(blob, node,
 258                                                         "fsp,dimm-twtr", 0x05);
 259                         mem->dimm_trrd = fdtdec_get_int(blob, node,
 260                                                         "fsp,dimm-trrd", 0x04);
 261                         mem->dimm_trtp = fdtdec_get_int(blob, node,
 262                                                         "fsp,dimm-trtp", 0x05);
 263                         mem->dimm_tfaw = fdtdec_get_int(blob, node,
 264                                                         "fsp,dimm-tfaw", 0x14);
 265                 }
 266         }
 267 }