2 * Copyright (C) 2013, Intel Corporation
3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4 * Copyright (C) 2015, Kodak Alaris, Inc
6 * SPDX-License-Identifier: Intel
11 #include <asm/arch/fsp/azalia.h>
12 #include <asm/fsp/fsp_support.h>
14 DECLARE_GLOBAL_DATA_PTR;
16 /* ALC262 Verb Table - 10EC0262 */
17 static const uint32_t verb_table_data13[] = {
18 /* Pin Complex (NID 0x11) */
23 /* Pin Complex (NID 0x12) */
28 /* Pin Complex (NID 0x14) */
33 /* Pin Complex (NID 0x15) */
38 /* Pin Complex (NID 0x16) */
43 /* Pin Complex (NID 0x18) */
48 /* Pin Complex (NID 0x19) */
53 /* Pin Complex (NID 0x1A) */
86 * This needs to be in ROM since if we put it in CAR, FSP init loses it when
89 * TODO(sjg@chromium.org): Move to device tree when FSP allows it
91 * VerbTable: (RealTek ALC262)
92 * Revision ID = 0xFF, support all steps
93 * Codec Verb Table For AZALIA
94 * Codec Address: CAd value (0/1/2)
95 * Codec Vendor: 0x10EC0262
97 static const struct pch_azalia_verb_table azalia_verb_table[] = {
111 const struct pch_azalia_config azalia_config = {
113 .docking_supported = 1,
114 .docking_attached = 0,
115 .hdmi_codec_enable = 1,
116 .azalia_v_ci_enable = 1,
118 .azalia_verb_table_num = 1,
119 .azalia_verb_table = azalia_verb_table,
120 .reset_wait_timer_us = 300
124 * Override the FSP's configuration data.
125 * If the device tree does not specify an integer setting, use the default
126 * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file.
128 void update_fsp_configs(struct fsp_config_data *config,
129 struct fspinit_rtbuf *rt_buf)
131 struct upd_region *fsp_upd = &config->fsp_upd;
132 struct memory_down_data *mem;
133 const void *blob = gd->fdt_blob;
136 /* Initialize runtime buffer for fsp_init() */
137 rt_buf->common.stack_top = config->common.stack_top - 32;
138 rt_buf->common.boot_mode = config->common.boot_mode;
139 rt_buf->common.upd_data = &config->fsp_upd;
141 fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config;
143 node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
145 debug("%s: Cannot find FSP node\n", __func__);
149 fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node,
150 "fsp,mrc-init-tseg-size",
151 MRC_INIT_TSEG_SIZE_1MB);
152 fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node,
153 "fsp,mrc-init-mmio-size",
154 MRC_INIT_MMIO_SIZE_2048MB);
155 fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node,
156 "fsp,mrc-init-spd-addr1",
158 fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node,
159 "fsp,mrc-init-spd-addr2",
161 fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node,
162 "fsp,emmc-boot-mode",
163 EMMC_BOOT_MODE_EMMC41);
164 fsp_upd->enable_sdio = fdtdec_get_bool(blob, node, "fsp,enable-sdio");
165 fsp_upd->enable_sdcard = fdtdec_get_bool(blob, node,
166 "fsp,enable-sdcard");
167 fsp_upd->enable_hsuart0 = fdtdec_get_bool(blob, node,
168 "fsp,enable-hsuart0");
169 fsp_upd->enable_hsuart1 = fdtdec_get_bool(blob, node,
170 "fsp,enable-hsuart1");
171 fsp_upd->enable_spi = fdtdec_get_bool(blob, node, "fsp,enable-spi");
172 fsp_upd->enable_sata = fdtdec_get_bool(blob, node, "fsp,enable-sata");
173 fsp_upd->sata_mode = fdtdec_get_int(blob, node, "fsp,sata-mode",
175 fsp_upd->enable_azalia = fdtdec_get_bool(blob, node,
176 "fsp,enable-azalia");
177 fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci");
178 fsp_upd->enable_lpe = fdtdec_get_bool(blob, node, "fsp,enable-lpe");
179 fsp_upd->lpss_sio_enable_pci_mode = fdtdec_get_bool(blob, node,
180 "fsp,lpss-sio-enable-pci-mode");
181 fsp_upd->enable_dma0 = fdtdec_get_bool(blob, node, "fsp,enable-dma0");
182 fsp_upd->enable_dma1 = fdtdec_get_bool(blob, node, "fsp,enable-dma1");
183 fsp_upd->enable_i2_c0 = fdtdec_get_bool(blob, node, "fsp,enable-i2c0");
184 fsp_upd->enable_i2_c1 = fdtdec_get_bool(blob, node, "fsp,enable-i2c1");
185 fsp_upd->enable_i2_c2 = fdtdec_get_bool(blob, node, "fsp,enable-i2c2");
186 fsp_upd->enable_i2_c3 = fdtdec_get_bool(blob, node, "fsp,enable-i2c3");
187 fsp_upd->enable_i2_c4 = fdtdec_get_bool(blob, node, "fsp,enable-i2c4");
188 fsp_upd->enable_i2_c5 = fdtdec_get_bool(blob, node, "fsp,enable-i2c5");
189 fsp_upd->enable_i2_c6 = fdtdec_get_bool(blob, node, "fsp,enable-i2c6");
190 fsp_upd->enable_pwm0 = fdtdec_get_bool(blob, node, "fsp,enable-pwm0");
191 fsp_upd->enable_pwm1 = fdtdec_get_bool(blob, node, "fsp,enable-pwm1");
192 fsp_upd->enable_hsi = fdtdec_get_bool(blob, node, "fsp,enable-hsi");
193 fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node,
194 "fsp,igd-dvmt50-pre-alloc", IGD_DVMT50_PRE_ALLOC_64MB);
195 fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size",
196 APERTURE_SIZE_256MB);
197 fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size",
199 fsp_upd->mrc_debug_msg = fdtdec_get_bool(blob, node,
200 "fsp,mrc-debug-msg");
201 fsp_upd->isp_enable = fdtdec_get_bool(blob, node, "fsp,isp-enable");
202 fsp_upd->scc_enable_pci_mode = fdtdec_get_bool(blob, node,
203 "fsp,scc-enable-pci-mode");
204 fsp_upd->igd_render_standby = fdtdec_get_bool(blob, node,
205 "fsp,igd-render-standby");
206 fsp_upd->txe_uma_enable = fdtdec_get_bool(blob, node,
207 "fsp,txe-uma-enable");
208 fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection",
210 fsp_upd->emmc45_ddr50_enabled = fdtdec_get_bool(blob, node,
211 "fsp,emmc45-ddr50-enabled");
212 fsp_upd->emmc45_hs200_enabled = fdtdec_get_bool(blob, node,
213 "fsp,emmc45-hs200-enabled");
214 fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node,
215 "fsp,emmc45-retune-timer-value", 8);
216 fsp_upd->enable_igd = fdtdec_get_bool(blob, node, "fsp,enable-igd");
218 mem = &fsp_upd->memory_params;
219 mem->enable_memory_down = fdtdec_get_bool(blob, node,
220 "fsp,enable-memory-down");
221 if (mem->enable_memory_down) {
222 node = fdtdec_next_compatible(blob, node,
223 COMPAT_INTEL_BAYTRAIL_FSP_MDP);
225 debug("%s: Cannot find FSP memory-down-params node\n",
228 mem->dram_speed = fdtdec_get_int(blob, node,
231 mem->dram_type = fdtdec_get_int(blob, node,
234 mem->dimm_0_enable = fdtdec_get_bool(blob, node,
235 "fsp,dimm-0-enable");
236 mem->dimm_1_enable = fdtdec_get_bool(blob, node,
237 "fsp,dimm-1-enable");
238 mem->dimm_width = fdtdec_get_int(blob, node,
241 mem->dimm_density = fdtdec_get_int(blob, node,
244 mem->dimm_bus_width = fdtdec_get_int(blob, node,
245 "fsp,dimm-bus-width",
246 DIMM_BUS_WIDTH_64BITS);
247 mem->dimm_sides = fdtdec_get_int(blob, node,
250 mem->dimm_tcl = fdtdec_get_int(blob, node,
251 "fsp,dimm-tcl", 0x09);
252 mem->dimm_trpt_rcd = fdtdec_get_int(blob, node,
253 "fsp,dimm-trpt-rcd", 0x09);
254 mem->dimm_twr = fdtdec_get_int(blob, node,
255 "fsp,dimm-twr", 0x0a);
256 mem->dimm_twtr = fdtdec_get_int(blob, node,
257 "fsp,dimm-twtr", 0x05);
258 mem->dimm_trrd = fdtdec_get_int(blob, node,
259 "fsp,dimm-trrd", 0x04);
260 mem->dimm_trtp = fdtdec_get_int(blob, node,
261 "fsp,dimm-trtp", 0x05);
262 mem->dimm_tfaw = fdtdec_get_int(blob, node,
263 "fsp,dimm-tfaw", 0x14);