1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2016 Vladimir Zapolskiy <vz@mleia.com>
4 * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
10 #include <asm/cache.h>
12 #include <asm/processor.h>
13 #include <asm/system.h>
16 #define CACHE_UPDATED 2
18 static inline void cache_wback_all(void)
20 unsigned long addr, data, i, j;
22 for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) {
23 for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
24 addr = CACHE_OC_ADDRESS_ARRAY
25 | (j << CACHE_OC_WAY_SHIFT)
26 | (i << CACHE_OC_ENTRY_SHIFT);
28 if (data & CACHE_UPDATED) {
29 data &= ~CACHE_UPDATED;
36 #define CACHE_ENABLE 0
37 #define CACHE_DISABLE 1
39 static int cache_control(unsigned int cmd)
46 if (ccr & CCR_CACHE_ENABLE)
49 if (cmd == CACHE_DISABLE)
50 outl(CCR_CACHE_STOP, CCR);
52 outl(CCR_CACHE_INIT, CCR);
58 void flush_dcache_range(unsigned long start, unsigned long end)
62 start &= ~(L1_CACHE_BYTES - 1);
63 for (v = start; v < end; v += L1_CACHE_BYTES) {
64 asm volatile ("ocbp %0" : /* no output */
69 void invalidate_dcache_range(unsigned long start, unsigned long end)
73 start &= ~(L1_CACHE_BYTES - 1);
74 for (v = start; v < end; v += L1_CACHE_BYTES) {
75 asm volatile ("ocbi %0" : /* no output */
80 void flush_cache(unsigned long addr, unsigned long size)
82 flush_dcache_range(addr , addr + size);
85 void icache_enable(void)
87 cache_control(CACHE_ENABLE);
90 void icache_disable(void)
92 cache_control(CACHE_DISABLE);
95 int icache_status(void)
100 void dcache_enable(void)
104 void dcache_disable(void)
108 int dcache_status(void)