1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * P5040 Silicon/SoC Device Tree Source (pre include)
5 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
11 /include/ "e5500_power_isa.dtsi"
16 interrupt-parent = <&mpic>;
22 cpu0: PowerPC,e5500@0 {
25 fsl,portid-mapping = <0x80000000>;
27 cpu1: PowerPC,e5500@1 {
30 fsl,portid-mapping = <0x40000000>;
32 cpu2: PowerPC,e5500@2 {
35 fsl,portid-mapping = <0x20000000>;
37 cpu3: PowerPC,e5500@3 {
40 fsl,portid-mapping = <0x10000000>;
45 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
46 reg = <0xf 0xfe000000 0 0x00001000>;
50 compatible = "simple-bus";
55 #interrupt-cells = <4>;
56 reg = <0x40000 0x40000>;
57 compatible = "fsl,mpic", "chrp,open-pic";
58 device_type = "open-pic";
59 clock-frequency = <0x0>;