arch/powerpc/cpu/mpc8xx/kgdb.S

   1 /*
   2  *  Copyright (C) 2000  Murray Jensen <Murray.Jensen@cmst.csiro.au>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <config.h>
   8 #include <command.h>
   9 #include <mpc8xx.h>
  10
  11 #include <ppc_asm.tmpl>
  12 #include <ppc_defs.h>
  13
  14 #include <asm/cache.h>
  15 #include <asm/mmu.h>
  16
  17 #if defined(CONFIG_CMD_KGDB)
  18
  19  /*
  20  * cache flushing routines for kgdb
  21  */
  22
  23         .globl  kgdb_flush_cache_all
  24 kgdb_flush_cache_all:
  25         lis     r3, IDC_INVALL@h
  26         mtspr   DC_CST, r3
  27         sync
  28         lis     r3, IDC_INVALL@h
  29         mtspr   IC_CST, r3
  30         SYNC
  31         blr
  32
  33         .globl  kgdb_flush_cache_range
  34 kgdb_flush_cache_range:
  35         li      r5,CONFIG_SYS_CACHELINE_SIZE-1
  36         andc    r3,r3,r5
  37         subf    r4,r3,r4
  38         add     r4,r4,r5
  39         srwi.   r4,r4,CONFIG_SYS_CACHELINE_SHIFT
  40         beqlr
  41         mtctr   r4
  42         mr      r6,r3
  43 1:      dcbst   0,r3
  44         addi    r3,r3,CONFIG_SYS_CACHELINE_SIZE
  45         bdnz    1b
  46         sync                            /* wait for dcbst's to get to ram */
  47         mtctr   r4
  48 2:      icbi    0,r6
  49         addi    r6,r6,CONFIG_SYS_CACHELINE_SIZE
  50         bdnz    2b
  51         SYNC
  52         blr
  53
  54 #endif