1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle
4 * Copyright (C) 1995, 1996 Paul M. Antoine
5 * Copyright (C) 1998 Ulf Carlsson
6 * Copyright (C) 1999 Silicon Graphics, Inc.
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2002, 2003, 2004, 2005, 2007 Maciej W. Rozycki
9 * Copyright (C) 2000, 2001, 2012 MIPS Technologies, Inc. All rights reserved.
10 * Copyright (C) 2014, Imagination Technologies Ltd.
18 #include <asm/mipsregs.h>
19 #include <asm/addrspace.h>
20 #include <asm/system.h>
22 DECLARE_GLOBAL_DATA_PTR;
24 static unsigned long saved_ebase;
26 static void show_regs(const struct pt_regs *regs)
28 const int field = 2 * sizeof(unsigned long);
29 unsigned int cause = regs->cp0_cause;
34 * Saved main processor registers
36 for (i = 0; i < 32; ) {
40 printf(" %0*lx", field, 0UL);
41 else if (i == 26 || i == 27)
42 printf(" %*s", field, "");
44 printf(" %0*lx", field, regs->regs[i]);
51 printf("Hi : %0*lx\n", field, regs->hi);
52 printf("Lo : %0*lx\n", field, regs->lo);
57 printf("epc : %0*lx (text %0*lx)\n", field, regs->cp0_epc,
58 field, regs->cp0_epc - gd->reloc_off);
59 printf("ra : %0*lx (text %0*lx)\n", field, regs->regs[31],
60 field, regs->regs[31] - gd->reloc_off);
62 printf("Status: %08x\n", (uint32_t) regs->cp0_status);
64 exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;
65 printf("Cause : %08x (ExcCode %02x)\n", cause, exccode);
67 if (1 <= exccode && exccode <= 5)
68 printf("BadVA : %0*lx\n", field, regs->cp0_badvaddr);
70 printf("PrId : %08x\n", read_c0_prid());
73 void do_reserved(const struct pt_regs *regs)
80 void do_ejtag_debug(const struct pt_regs *regs)
82 const int field = 2 * sizeof(unsigned long);
86 depc = read_c0_depc();
87 debug = read_c0_debug();
89 printf("SDBBP EJTAG debug exception: c0_depc = %0*lx, DEBUG = %08x\n",
93 static void set_handler(unsigned long offset, void *addr, unsigned long size)
95 unsigned long ebase = gd->irq_sp;
97 memcpy((void *)(ebase + offset), addr, size);
98 flush_cache(ebase + offset, size);
101 void trap_init(ulong reloc_addr)
103 unsigned long ebase = gd->irq_sp;
105 set_handler(0x180, &except_vec3_generic, 0x80);
106 set_handler(0x280, &except_vec_ejtag_debug, 0x80);
108 saved_ebase = read_c0_ebase() & 0xfffff000;
110 write_c0_ebase(ebase);
111 clear_c0_status(ST0_BEV);
112 execution_hazard_barrier();
115 void trap_restore(void)
117 set_c0_status(ST0_BEV);
118 execution_hazard_barrier();
120 #ifdef CONFIG_OVERRIDE_EXCEPTION_VECTOR_BASE
121 write_c0_ebase(CONFIG_NEW_EXCEPTION_VECTOR_BASE & 0xfffff000);
123 write_c0_ebase(saved_ebase);
126 clear_c0_status(ST0_BEV);
127 execution_hazard_barrier();