fd0c1228c34657275f906a946f9353e77e7c3db0
[oweals/u-boot.git] / arch / arm / mach-zynqmp / spl.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2015 - 2016 Xilinx, Inc.
4  *
5  * Michal Simek <michal.simek@xilinx.com>
6  */
7
8 #include <common.h>
9 #include <image.h>
10 #include <init.h>
11 #include <log.h>
12 #include <spl.h>
13
14 #include <asm/io.h>
15 #include <asm/spl.h>
16 #include <asm/arch/hardware.h>
17 #include <asm/arch/psu_init_gpl.h>
18 #include <asm/arch/sys_proto.h>
19
20 void board_init_f(ulong dummy)
21 {
22         board_early_init_f();
23         board_early_init_r();
24 }
25
26 static void ps_mode_reset(ulong mode)
27 {
28         writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
29                &crlapb_base->boot_pin_ctrl);
30         udelay(5);
31         writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
32                mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
33                &crlapb_base->boot_pin_ctrl);
34 }
35
36 /*
37  * Set default PS_MODE1 which is used for USB ULPI phy reset
38  * Also other resets can be connected to this certain pin
39  */
40 #ifndef MODE_RESET
41 # define MODE_RESET     PS_MODE1
42 #endif
43
44 #ifdef CONFIG_SPL_BOARD_INIT
45 void spl_board_init(void)
46 {
47         preloader_console_init();
48         ps_mode_reset(MODE_RESET);
49         board_init();
50         psu_post_config_data();
51 }
52 #endif
53
54 void board_boot_order(u32 *spl_boot_list)
55 {
56         spl_boot_list[0] = spl_boot_device();
57
58         if (spl_boot_list[0] == BOOT_DEVICE_MMC1)
59                 spl_boot_list[1] = BOOT_DEVICE_MMC2;
60         if (spl_boot_list[0] == BOOT_DEVICE_MMC2)
61                 spl_boot_list[1] = BOOT_DEVICE_MMC1;
62
63         spl_boot_list[2] = BOOT_DEVICE_RAM;
64 }
65
66 u32 spl_boot_device(void)
67 {
68         u32 reg = 0;
69         u8 bootmode;
70
71 #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
72         /* Change default boot mode at run-time */
73         writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
74                &crlapb_base->boot_mode);
75 #endif
76
77         reg = readl(&crlapb_base->boot_mode);
78         if (reg >> BOOT_MODE_ALT_SHIFT)
79                 reg >>= BOOT_MODE_ALT_SHIFT;
80
81         bootmode = reg & BOOT_MODES_MASK;
82
83         switch (bootmode) {
84         case JTAG_MODE:
85                 return BOOT_DEVICE_RAM;
86 #ifdef CONFIG_SPL_MMC_SUPPORT
87         case SD_MODE1:
88         case SD1_LSHFT_MODE: /* not working on silicon v1 */
89                 return BOOT_DEVICE_MMC2;
90         case SD_MODE:
91         case EMMC_MODE:
92                 return BOOT_DEVICE_MMC1;
93 #endif
94 #ifdef CONFIG_SPL_DFU
95         case USB_MODE:
96                 return BOOT_DEVICE_DFU;
97 #endif
98 #ifdef CONFIG_SPL_SATA_SUPPORT
99         case SW_SATA_MODE:
100                 return BOOT_DEVICE_SATA;
101 #endif
102 #ifdef CONFIG_SPL_SPI_SUPPORT
103         case QSPI_MODE_24BIT:
104         case QSPI_MODE_32BIT:
105                 return BOOT_DEVICE_SPI;
106 #endif
107         default:
108                 printf("Invalid Boot Mode:0x%x\n", bootmode);
109                 break;
110         }
111
112         return 0;
113 }
114
115 #ifdef CONFIG_SPL_OS_BOOT
116 int spl_start_uboot(void)
117 {
118         return 0;
119 }
120 #endif
121
122 #ifdef CONFIG_SPL_LOAD_FIT
123 int board_fit_config_name_match(const char *name)
124 {
125         /* Just empty function now - can't decide what to choose */
126         debug("%s: %s\n", __func__, name);
127
128         return -1;
129 }
130 #endif