arch/arm/mach-uniphier/spl_board_init.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015-2016 Socionext Inc.
   4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   5  */
   6
   7 #include <common.h>
   8 #include <debug_uart.h>
   9 #include <hang.h>
  10 #include <spl.h>
  11
  12 #include "init.h"
  13 #include "micro-support-card.h"
  14 #include "soc-info.h"
  15
  16 struct uniphier_spl_initdata {
  17         unsigned int soc_id;
  18         void (*bcu_init)(const struct uniphier_board_data *bd);
  19         void (*early_clk_init)(void);
  20         int (*dpll_init)(const struct uniphier_board_data *bd);
  21         int (*memconf_init)(const struct uniphier_board_data *bd);
  22         void (*dram_clk_init)(void);
  23         int (*umc_init)(const struct uniphier_board_data *bd);
  24 };
  25
  26 static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
  27 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
  28         {
  29                 .soc_id = UNIPHIER_LD4_ID,
  30                 .bcu_init = uniphier_ld4_bcu_init,
  31                 .early_clk_init = uniphier_ld4_early_clk_init,
  32                 .dpll_init = uniphier_ld4_dpll_init,
  33                 .memconf_init = uniphier_memconf_2ch_init,
  34                 .dram_clk_init = uniphier_ld4_dram_clk_init,
  35                 .umc_init = uniphier_ld4_umc_init,
  36         },
  37 #endif
  38 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
  39         {
  40                 .soc_id = UNIPHIER_PRO4_ID,
  41                 .early_clk_init = uniphier_ld4_early_clk_init,
  42                 .dpll_init = uniphier_pro4_dpll_init,
  43                 .memconf_init = uniphier_memconf_2ch_init,
  44                 .dram_clk_init = uniphier_ld4_dram_clk_init,
  45                 .umc_init = uniphier_pro4_umc_init,
  46         },
  47 #endif
  48 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
  49         {
  50                 .soc_id = UNIPHIER_SLD8_ID,
  51                 .bcu_init = uniphier_ld4_bcu_init,
  52                 .early_clk_init = uniphier_ld4_early_clk_init,
  53                 .dpll_init = uniphier_sld8_dpll_init,
  54                 .memconf_init = uniphier_memconf_2ch_init,
  55                 .dram_clk_init = uniphier_ld4_dram_clk_init,
  56                 .umc_init = uniphier_sld8_umc_init,
  57         },
  58 #endif
  59 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
  60         {
  61                 .soc_id = UNIPHIER_PRO5_ID,
  62                 .early_clk_init = uniphier_ld4_early_clk_init,
  63                 .dpll_init = uniphier_pro5_dpll_init,
  64                 .memconf_init = uniphier_memconf_2ch_init,
  65                 .dram_clk_init = uniphier_pro5_dram_clk_init,
  66                 .umc_init = uniphier_pro5_umc_init,
  67         },
  68 #endif
  69 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
  70         {
  71                 .soc_id = UNIPHIER_PXS2_ID,
  72                 .early_clk_init = uniphier_ld4_early_clk_init,
  73                 .dpll_init = uniphier_pxs2_dpll_init,
  74                 .memconf_init = uniphier_memconf_3ch_init,
  75                 .dram_clk_init = uniphier_pxs2_dram_clk_init,
  76                 .umc_init = uniphier_pxs2_umc_init,
  77         },
  78 #endif
  79 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
  80         {
  81                 .soc_id = UNIPHIER_LD6B_ID,
  82                 .early_clk_init = uniphier_ld4_early_clk_init,
  83                 .dpll_init = uniphier_pxs2_dpll_init,
  84                 .memconf_init = uniphier_memconf_3ch_init,
  85                 .dram_clk_init = uniphier_pxs2_dram_clk_init,
  86                 .umc_init = uniphier_pxs2_umc_init,
  87         },
  88 #endif
  89 };
  90 UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_spl_initdata, uniphier_spl_initdata)
  91
  92 void spl_board_init(void)
  93 {
  94         const struct uniphier_board_data *bd;
  95         const struct uniphier_spl_initdata *initdata;
  96         int ret;
  97
  98 #ifdef CONFIG_DEBUG_UART
  99         debug_uart_init();
 100 #endif
 101
 102         bd = uniphier_get_board_param();
 103         if (!bd)
 104                 hang();
 105
 106         initdata = uniphier_get_spl_initdata();
 107         if (!initdata)
 108                 hang();
 109
 110         if (initdata->bcu_init)
 111                 initdata->bcu_init(bd);
 112
 113         initdata->early_clk_init();
 114
 115         preloader_console_init();
 116
 117         ret = initdata->dpll_init(bd);
 118         if (ret) {
 119                 pr_err("failed to init DPLL\n");
 120                 hang();
 121         }
 122
 123         ret = initdata->memconf_init(bd);
 124         if (ret) {
 125                 pr_err("failed to init MEMCONF\n");
 126                 hang();
 127         }
 128
 129         initdata->dram_clk_init();
 130
 131         ret = initdata->umc_init(bd);
 132         if (ret) {
 133                 pr_err("failed to init DRAM\n");
 134                 hang();
 135         }
 136 }