arch/arm/mach-tegra/gpu.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
   4  */
   5
   6 /* Tegra vpr routines */
   7
   8 #include <common.h>
   9 #include <asm/io.h>
  10 #include <asm/arch/tegra.h>
  11 #include <asm/arch/mc.h>
  12 #include <asm/arch-tegra/ap.h>
  13
  14 #include <fdt_support.h>
  15
  16 static bool _configured;
  17
  18 void tegra_gpu_config(void)
  19 {
  20         struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
  21
  22 #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
  23         if (!tegra_cpu_is_non_secure())
  24 #endif
  25         {
  26                 /* Turn VPR off */
  27                 writel(0, &mc->mc_video_protect_size_mb);
  28                 writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
  29                        &mc->mc_video_protect_reg_ctrl);
  30                 /* read back to ensure the write went through */
  31                 readl(&mc->mc_video_protect_reg_ctrl);
  32         }
  33
  34         debug("configured VPR\n");
  35
  36         _configured = true;
  37 }
  38
  39 #if defined(CONFIG_OF_LIBFDT)
  40
  41 int tegra_gpu_enable_node(void *blob, const char *compat)
  42 {
  43         int offset;
  44
  45         if (!_configured)
  46                 return 0;
  47
  48         offset = fdt_node_offset_by_compatible(blob, -1, compat);
  49         while (offset != -FDT_ERR_NOTFOUND) {
  50                 fdt_status_okay(blob, offset);
  51                 offset = fdt_node_offset_by_compatible(blob, offset, compat);
  52         }
  53
  54         return 0;
  55 }
  56
  57 #endif