arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c

   1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
   4  */
   5
   6 #include <common.h>
   7 #include <console.h>
   8 #include <dfu.h>
   9 #include <malloc.h>
  10 #include <serial.h>
  11 #include <watchdog.h>
  12 #include <dm/lists.h>
  13 #include <dm/device-internal.h>
  14 #include "stm32prog.h"
  15
  16 /* - configuration part -----------------------------*/
  17 #define USART_BL_VERSION        0x40    /* USART bootloader version V4.0*/
  18 #define UBOOT_BL_VERSION        0x03    /* bootloader version V0.3*/
  19 #define DEVICE_ID_BYTE1         0x05    /* MSB byte of device ID*/
  20 #define DEVICE_ID_BYTE2         0x00    /* LSB byte of device ID*/
  21 #define USART_RAM_BUFFER_SIZE   256     /* Size of USART_RAM_Buf buffer*/
  22
  23 /* - Commands -----------------------------*/
  24 #define GET_CMD_COMMAND         0x00    /* Get CMD command*/
  25 #define GET_VER_COMMAND         0x01    /* Get Version command*/
  26 #define GET_ID_COMMAND          0x02    /* Get ID command*/
  27 #define GET_PHASE_COMMAND       0x03    /* Get Phase command*/
  28 #define RM_COMMAND              0x11    /* Read Memory command*/
  29 #define READ_PART_COMMAND       0x12    /* Read Partition command*/
  30 #define START_COMMAND           0x21    /* START command (Go)*/
  31 #define DOWNLOAD_COMMAND        0x31    /* Download command*/
  32 /* existing command for other STM32 but not used */
  33 /* ERASE                        0x43 */
  34 /* EXTENDED_ERASE               0x44 */
  35 /* WRITE_UNPROTECTED            0x73 */
  36 /* READOUT_PROTECT              0x82 */
  37 /* READOUT_UNPROTECT            0x92 */
  38
  39 /* - miscellaneous defines ----------------------------------------*/
  40 #define INIT_BYTE               0x7F    /*Init Byte ID*/
  41 #define ACK_BYTE                0x79    /*Acknowlede Byte ID*/
  42 #define NACK_BYTE               0x1F    /*No Acknowlede Byte ID*/
  43 #define ABORT_BYTE              0x5F    /*ABORT*/
  44
  45 struct udevice *down_serial_dev;
  46
  47 const u8 cmd_id[] = {
  48         GET_CMD_COMMAND,
  49         GET_VER_COMMAND,
  50         GET_ID_COMMAND,
  51         GET_PHASE_COMMAND,
  52         RM_COMMAND,
  53         READ_PART_COMMAND,
  54         START_COMMAND,
  55         DOWNLOAD_COMMAND
  56 };
  57
  58 #define NB_CMD sizeof(cmd_id)
  59
  60 /* DFU support for serial *********************************************/
  61 static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
  62 {
  63         int alt_id;
  64
  65         if (!data->cur_part)
  66                 if (data->phase == PHASE_FLASHLAYOUT)
  67                         alt_id = 0;
  68                 else
  69                         return NULL;
  70         else
  71                 alt_id = data->cur_part->alt_id;
  72
  73         return dfu_get_entity(alt_id);
  74 }
  75
  76 static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
  77                            u32 buffer_size)
  78 {
  79         struct dfu_entity *dfu_entity;
  80         u8 ret = 0;
  81
  82         dfu_entity = stm32prog_get_entity(data);
  83         if (!dfu_entity)
  84                 return -ENODEV;
  85
  86         ret = dfu_write(dfu_entity,
  87                         buffer,
  88                         buffer_size,
  89                         data->dfu_seq);
  90
  91         if (ret) {
  92                 stm32prog_err("DFU write failed [%d] cnt: %d",
  93                               ret, data->dfu_seq);
  94         }
  95         data->dfu_seq++;
  96         /* handle rollover as in driver/dfu/dfu.c */
  97         data->dfu_seq &= 0xffff;
  98         if (buffer_size == 0)
  99                 data->dfu_seq = 0; /* flush done */
 100
 101         return ret;
 102 }
 103
 104 static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
 105                           u8 *buffer, u32 buffer_size)
 106 {
 107         struct dfu_entity *dfu_entity;
 108         struct stm32prog_part_t *part;
 109         u32 size;
 110         int ret, i;
 111
 112         if (data->dfu_seq) {
 113                 stm32prog_err("DFU write pending for phase %d, seq %d",
 114                               data->phase, data->dfu_seq);
 115                 return -EINVAL;
 116         }
 117         if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
 118                 stm32prog_err("read failed : phase %d is invalid", phase);
 119                 return -EINVAL;
 120         }
 121         if (data->read_phase <= PHASE_LAST_USER &&
 122             phase != data->read_phase) {
 123                 /* clear previous read session */
 124                 dfu_entity = dfu_get_entity(data->read_phase - 1);
 125                 if (dfu_entity)
 126                         dfu_transaction_cleanup(dfu_entity);
 127         }
 128
 129         dfu_entity = NULL;
 130         /* found partition for the expected phase */
 131         for (i = 0; i < data->part_nb; i++) {
 132                 part = &data->part_array[i];
 133                 if (part->id == phase)
 134                         dfu_entity = dfu_get_entity(part->alt_id);
 135         }
 136         if (!dfu_entity) {
 137                 stm32prog_err("read failed : phase %d is unknown", phase);
 138                 return -ENODEV;
 139         }
 140
 141         /* clear pending read before to force offset */
 142         if (dfu_entity->inited &&
 143             (data->read_phase != phase || data->offset != offset))
 144                 dfu_transaction_cleanup(dfu_entity);
 145
 146         /* initiate before to force offset */
 147         if (!dfu_entity->inited) {
 148                 ret = dfu_transaction_initiate(dfu_entity, true);
 149                         if (ret < 0) {
 150                                 stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
 151                                               ret, phase, offset);
 152                         return ret;
 153                 }
 154         }
 155         /* force new offset */
 156         if (dfu_entity->offset != offset)
 157                 dfu_entity->offset = offset;
 158         data->offset = offset;
 159         data->read_phase = phase;
 160         pr_debug("\nSTM32 download read %s offset=0x%x\n",
 161                  dfu_entity->name, offset);
 162         ret = dfu_read(dfu_entity, buffer, buffer_size,
 163                        dfu_entity->i_blk_seq_num);
 164         if (ret < 0) {
 165                 stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
 166                               ret, phase, offset);
 167                 return ret;
 168         }
 169
 170         size = ret;
 171
 172         if (size < buffer_size) {
 173                 data->offset = 0;
 174                 data->read_phase = PHASE_END;
 175                 memset(buffer + size, 0, buffer_size - size);
 176         } else {
 177                 data->offset += size;
 178         }
 179
 180         return ret;
 181 }
 182
 183 /* UART access ***************************************************/
 184 int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
 185 {
 186         struct udevice *dev = NULL;
 187         int node;
 188         char alias[10];
 189         const char *path;
 190         struct dm_serial_ops *ops;
 191         /* no parity, 8 bits, 1 stop */
 192         u32 serial_config = SERIAL_DEFAULT_CONFIG;
 193
 194         down_serial_dev = NULL;
 195
 196         sprintf(alias, "serial%d", link_dev);
 197         path = fdt_get_alias(gd->fdt_blob, alias);
 198         if (!path) {
 199                 pr_err("%s alias not found", alias);
 200                 return -ENODEV;
 201         }
 202         node = fdt_path_offset(gd->fdt_blob, path);
 203         if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node,
 204                                             &dev)) {
 205                 down_serial_dev = dev;
 206         } else if (node > 0 &&
 207                    !lists_bind_fdt(gd->dm_root, offset_to_ofnode(node),
 208                                    &dev, false)) {
 209                 if (!device_probe(dev))
 210                         down_serial_dev = dev;
 211         }
 212         if (!down_serial_dev) {
 213                 pr_err("%s = %s device not found", alias, path);
 214                 return -ENODEV;
 215         }
 216
 217         /* force silent console on uart only when used */
 218         if (gd->cur_serial_dev == down_serial_dev)
 219                 gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
 220         else
 221                 gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
 222
 223         ops = serial_get_ops(down_serial_dev);
 224
 225         if (!ops) {
 226                 pr_err("%s = %s missing ops", alias, path);
 227                 return -ENODEV;
 228         }
 229         if (!ops->setconfig) {
 230                 pr_err("%s = %s missing setconfig", alias, path);
 231                 return -ENODEV;
 232         }
 233
 234         clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
 235
 236         data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
 237                                 USART_RAM_BUFFER_SIZE);
 238
 239         return ops->setconfig(down_serial_dev, serial_config);
 240 }
 241
 242 static void stm32prog_serial_flush(void)
 243 {
 244         struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
 245         int err;
 246
 247         do {
 248                 err = ops->getc(down_serial_dev);
 249         } while (err != -EAGAIN);
 250 }
 251
 252 static int stm32prog_serial_getc_err(void)
 253 {
 254         struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
 255         int err;
 256
 257         do {
 258                 err = ops->getc(down_serial_dev);
 259                 if (err == -EAGAIN) {
 260                         ctrlc();
 261                         WATCHDOG_RESET();
 262                 }
 263         } while ((err == -EAGAIN) && (!had_ctrlc()));
 264
 265         return err;
 266 }
 267
 268 static u8 stm32prog_serial_getc(void)
 269 {
 270         int err;
 271
 272         err = stm32prog_serial_getc_err();
 273
 274         return err >= 0 ? err : 0;
 275 }
 276
 277 static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
 278 {
 279         struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
 280         int err;
 281
 282         do {
 283                 err = ops->getc(down_serial_dev);
 284                 if (err >= 0) {
 285                         *buffer++ = err;
 286                         *count -= 1;
 287                 } else if (err == -EAGAIN) {
 288                         ctrlc();
 289                         WATCHDOG_RESET();
 290                 } else {
 291                         break;
 292                 }
 293         } while (*count && !had_ctrlc());
 294
 295         return !!(err < 0);
 296 }
 297
 298 static void stm32prog_serial_putc(u8 w_byte)
 299 {
 300         struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
 301         int err;
 302
 303         do {
 304                 err = ops->putc(down_serial_dev, w_byte);
 305         } while (err == -EAGAIN);
 306 }
 307
 308 /* Helper function ************************************************/
 309
 310 static u8 stm32prog_header(struct stm32prog_data *data)
 311 {
 312         u8 ret;
 313         u8 boot = 0;
 314         struct dfu_entity *dfu_entity;
 315         u64 size = 0;
 316
 317         dfu_entity = stm32prog_get_entity(data);
 318         if (!dfu_entity)
 319                 return -ENODEV;
 320
 321         printf("\nSTM32 download write %s\n", dfu_entity->name);
 322
 323         /* force cleanup to avoid issue with previous read */
 324         dfu_transaction_cleanup(dfu_entity);
 325
 326         ret = stm32prog_header_check(data->header_data,
 327                                      &data->header);
 328
 329         /* no header : max size is partition size */
 330         if (ret) {
 331                 dfu_entity->get_medium_size(dfu_entity, &size);
 332                 data->header.image_length = size;
 333         }
 334
 335         /**** Flash the header if necessary for boot partition */
 336         if (data->phase < PHASE_FIRST_USER)
 337                 boot = 1;
 338
 339         /* write header if boot partition */
 340         if (boot) {
 341                 if (ret) {
 342                         stm32prog_err("invalid header (error %d)", ret);
 343                 } else {
 344                         ret = stm32prog_write(data,
 345                                               (u8 *)data->header_data,
 346                                               BL_HEADER_SIZE);
 347                 }
 348         } else {
 349                 if (ret)
 350                         printf("  partition without checksum\n");
 351                 ret = 0;
 352         }
 353
 354         free(data->header_data);
 355         data->header_data = NULL;
 356
 357         return ret;
 358 }
 359
 360 static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
 361 {
 362         u8 ret = 0;
 363         struct dfu_entity *dfu_entity;
 364
 365         if (address < 0x100) {
 366                 if (address == PHASE_OTP)
 367                         return stm32prog_otp_start(data);
 368
 369                 if (address == PHASE_PMIC)
 370                         return stm32prog_pmic_start(data);
 371
 372                 if (address == PHASE_RESET || address == PHASE_END) {
 373                         data->cur_part = NULL;
 374                         data->dfu_seq = 0;
 375                         data->phase = address;
 376                         return 0;
 377                 }
 378                 if (address != data->phase) {
 379                         stm32prog_err("invalid received phase id %d, current phase is %d",
 380                                       (u8)address, (u8)data->phase);
 381                         return -EINVAL;
 382                 }
 383         }
 384         /* check the last loaded partition */
 385         if (address == DEFAULT_ADDRESS || address == data->phase) {
 386                 switch (data->phase) {
 387                 case PHASE_END:
 388                 case PHASE_RESET:
 389                 case PHASE_DO_RESET:
 390                         data->cur_part = NULL;
 391                         data->phase = PHASE_DO_RESET;
 392                         return 0;
 393                 }
 394                 dfu_entity = stm32prog_get_entity(data);
 395                 if (!dfu_entity)
 396                         return -ENODEV;
 397
 398                 if (data->dfu_seq) {
 399                         ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
 400                         data->dfu_seq = 0;
 401                         if (ret) {
 402                                 stm32prog_err("DFU flush failed [%d]", ret);
 403                                 return ret;
 404                         }
 405                 }
 406                 printf("\n  received length = 0x%x\n", data->cursor);
 407                 if (data->header.present) {
 408                         if (data->cursor !=
 409                             (data->header.image_length + BL_HEADER_SIZE)) {
 410                                 stm32prog_err("transmission interrupted (length=0x%x expected=0x%x)",
 411                                               data->cursor,
 412                                               data->header.image_length +
 413                                               BL_HEADER_SIZE);
 414                                 return -EIO;
 415                         }
 416                         if (data->header.image_checksum != data->checksum) {
 417                                 stm32prog_err("invalid checksum received (0x%x expected 0x%x)",
 418                                               data->checksum,
 419                                               data->header.image_checksum);
 420                                 return -EIO;
 421                         }
 422                         printf("\n  checksum OK (0x%x)\n", data->checksum);
 423                 }
 424
 425                 /* update DFU with received flashlayout */
 426                 if (data->phase == PHASE_FLASHLAYOUT)
 427                         stm32prog_dfu_init(data);
 428         } else {
 429                 void (*entry)(void) = (void *)address;
 430
 431                 printf("## Starting application at 0x%x ...\n", address);
 432                 (*entry)();
 433                 printf("## Application terminated\n");
 434                 ret = -ENOEXEC;
 435         }
 436
 437         return ret;
 438 }
 439
 440 /**
 441  * get_address() - Get address if it is valid
 442  *
 443  * @tmp_xor:            Current xor value to update
 444  * @return The address area
 445  */
 446 static u32 get_address(u8 *tmp_xor)
 447 {
 448         u32 address = 0x0;
 449         u8 data;
 450
 451         data = stm32prog_serial_getc();
 452         *tmp_xor ^= data;
 453         address |= ((u32)data) << 24;
 454
 455         data = stm32prog_serial_getc();
 456         address |= ((u32)data) << 16;
 457         *tmp_xor ^= data;
 458
 459         data = stm32prog_serial_getc();
 460         address |= ((u32)data) << 8;
 461         *tmp_xor ^= data;
 462
 463         data = stm32prog_serial_getc();
 464         address |= ((u32)data);
 465         *tmp_xor ^= data;
 466
 467         return address;
 468 }
 469
 470 static void stm32prog_serial_result(u8 result)
 471 {
 472         /* always flush fifo before to send result */
 473         stm32prog_serial_flush();
 474         stm32prog_serial_putc(result);
 475 }
 476
 477 /* Command -----------------------------------------------*/
 478 /**
 479  * get_cmd_command() - Respond to Get command
 480  *
 481  * @data:               Current command context
 482  */
 483 static void get_cmd_command(struct stm32prog_data *data)
 484 {
 485         u32 counter = 0x0;
 486
 487         stm32prog_serial_putc(NB_CMD);
 488         stm32prog_serial_putc(USART_BL_VERSION);
 489
 490         for (counter = 0; counter < NB_CMD; counter++)
 491                 stm32prog_serial_putc(cmd_id[counter]);
 492
 493         stm32prog_serial_result(ACK_BYTE);
 494 }
 495
 496 /**
 497  * get_version_command() - Respond to Get Version command
 498  *
 499  * @data:               Current command context
 500  */
 501 static void get_version_command(struct stm32prog_data *data)
 502 {
 503         stm32prog_serial_putc(UBOOT_BL_VERSION);
 504         stm32prog_serial_result(ACK_BYTE);
 505 }
 506
 507 /**
 508  * get_id_command() - Respond to Get ID command
 509  *
 510  * @data:               Current command context
 511  */
 512 static void get_id_command(struct stm32prog_data *data)
 513 {
 514         /* Send Device IDCode */
 515         stm32prog_serial_putc(0x1);
 516         stm32prog_serial_putc(DEVICE_ID_BYTE1);
 517         stm32prog_serial_putc(DEVICE_ID_BYTE2);
 518         stm32prog_serial_result(ACK_BYTE);
 519 }
 520
 521 /**
 522  * get_phase_command() - Respond to Get phase
 523  *
 524  * @data:               Current command context
 525  */
 526 static void get_phase_command(struct stm32prog_data *data)
 527 {
 528         char *err_msg = NULL;
 529         u8 i, length = 0;
 530         u32 destination = DEFAULT_ADDRESS; /* destination address */
 531         int phase = data->phase;
 532
 533         if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
 534                 err_msg = stm32prog_get_error(data);
 535                 length = strlen(err_msg);
 536         }
 537         if (phase == PHASE_FLASHLAYOUT)
 538                 destination = STM32_DDR_BASE;
 539
 540         stm32prog_serial_putc(length + 5);           /* Total length */
 541         stm32prog_serial_putc(phase & 0xFF);         /* partition ID */
 542         stm32prog_serial_putc(destination);          /* byte 1 of address */
 543         stm32prog_serial_putc(destination >> 8);     /* byte 2 of address */
 544         stm32prog_serial_putc(destination >> 16);    /* byte 3 of address */
 545         stm32prog_serial_putc(destination >> 24);    /* byte 4 of address */
 546
 547         stm32prog_serial_putc(length);               /* Information length */
 548         for (i = 0; i < length; i++)
 549                 stm32prog_serial_putc(err_msg[i]);
 550         stm32prog_serial_result(ACK_BYTE);
 551
 552         if (phase == PHASE_RESET)
 553                 stm32prog_do_reset(data);
 554 }
 555
 556 /**
 557  * read_memory_command() - Read data from memory
 558  *
 559  * @data:               Current command context
 560  */
 561 static void read_memory_command(struct stm32prog_data *data)
 562 {
 563         u32 address = 0x0;
 564         u8 rcv_data = 0x0, tmp_xor = 0x0;
 565         u32 counter = 0x0;
 566
 567         /* Read memory address */
 568         address = get_address(&tmp_xor);
 569
 570         /* If address memory is not received correctly */
 571         rcv_data = stm32prog_serial_getc();
 572         if (rcv_data != tmp_xor) {
 573                 stm32prog_serial_result(NACK_BYTE);
 574                 return;
 575         }
 576
 577         stm32prog_serial_result(ACK_BYTE);
 578
 579         /* Read the number of bytes to be received:
 580          * Max NbrOfData = Data + 1 = 256
 581          */
 582         rcv_data = stm32prog_serial_getc();
 583         tmp_xor = ~rcv_data;
 584         if (stm32prog_serial_getc() != tmp_xor) {
 585                 stm32prog_serial_result(NACK_BYTE);
 586                 return;
 587         }
 588
 589         /* If checksum is correct send ACK */
 590         stm32prog_serial_result(ACK_BYTE);
 591
 592         /* Send data to the host:
 593          * Number of data to read = data + 1
 594          */
 595         for (counter = (rcv_data + 1); counter != 0; counter--)
 596                 stm32prog_serial_putc(*(u8 *)(address++));
 597 }
 598
 599 /**
 600  * start_command() - Respond to start command
 601  *
 602  * Jump to user application in RAM or partition check
 603  *
 604  * @data:               Current command context
 605  */
 606 static void start_command(struct stm32prog_data *data)
 607 {
 608         u32 address = 0;
 609         u8 tmp_xor = 0x0;
 610         u8 ret, rcv_data;
 611
 612         /* Read memory address */
 613         address = get_address(&tmp_xor);
 614
 615         /* If address memory is not received correctly */
 616         rcv_data = stm32prog_serial_getc();
 617         if (rcv_data != tmp_xor) {
 618                 stm32prog_serial_result(NACK_BYTE);
 619                 return;
 620         }
 621         /* validate partition */
 622         ret = stm32prog_start(data,
 623                               address);
 624
 625         if (ret)
 626                 stm32prog_serial_result(ABORT_BYTE);
 627         else
 628                 stm32prog_serial_result(ACK_BYTE);
 629 }
 630
 631 /**
 632  * download_command() - Respond to download command
 633  *
 634  * Write data to not volatile memory, Flash
 635  *
 636  * @data:               Current command context
 637  */
 638 static void download_command(struct stm32prog_data *data)
 639 {
 640         u32 address = 0x0;
 641         u8 my_xor = 0x0;
 642         u8 rcv_xor;
 643         u32 counter = 0x0, codesize = 0x0;
 644         u8 *ramaddress = 0;
 645         u8 rcv_data = 0x0;
 646         struct image_header_s *image_header = &data->header;
 647         u32 cursor = data->cursor;
 648         long size = 0;
 649         u8 operation;
 650         u32 packet_number;
 651         u32 result = ACK_BYTE;
 652         u8 ret;
 653         unsigned int i;
 654         bool error;
 655         int rcv;
 656
 657         address = get_address(&my_xor);
 658
 659         /* If address memory is not received correctly */
 660         rcv_xor = stm32prog_serial_getc();
 661         if (rcv_xor != my_xor) {
 662                 result = NACK_BYTE;
 663                 goto end;
 664         }
 665
 666         /* If address valid send ACK */
 667         stm32prog_serial_result(ACK_BYTE);
 668
 669         /* get packet number and operation type */
 670         operation = (u8)((u32)address >> 24);
 671         packet_number = ((u32)(((u32)address << 8))) >> 8;
 672
 673         switch (operation) {
 674         /* supported operation */
 675         case PHASE_FLASHLAYOUT:
 676         case PHASE_OTP:
 677         case PHASE_PMIC:
 678                 break;
 679         default:
 680                 result = NACK_BYTE;
 681                 goto end;
 682         }
 683         /* check the packet number */
 684         if (packet_number == 0) {
 685                 /* erase: re-initialize the image_header struct */
 686                 data->packet_number = 0;
 687                 if (data->header_data)
 688                         memset(data->header_data, 0, BL_HEADER_SIZE);
 689                 else
 690                         data->header_data = calloc(1, BL_HEADER_SIZE);
 691                 cursor = 0;
 692                 data->cursor = 0;
 693                 data->checksum = 0;
 694                 /*idx = cursor;*/
 695         } else {
 696                 data->packet_number++;
 697         }
 698
 699         /* Check with the number of current packet if the device receive
 700          * the true packet
 701          */
 702         if (packet_number != data->packet_number) {
 703                 data->packet_number--;
 704                 result = NACK_BYTE;
 705                 goto end;
 706         }
 707
 708         /*-- Read number of bytes to be written and data -----------*/
 709
 710         /* Read the number of bytes to be written:
 711          * Max NbrOfData = data + 1 <= 256
 712          */
 713         rcv_data = stm32prog_serial_getc();
 714
 715         /* NbrOfData to write = data + 1 */
 716         codesize = rcv_data + 0x01;
 717
 718         if (codesize > USART_RAM_BUFFER_SIZE) {
 719                 result = NACK_BYTE;
 720                 goto end;
 721         }
 722
 723         /* Checksum Initialization */
 724         my_xor = rcv_data;
 725
 726         /* UART receive data and send to Buffer */
 727         counter = codesize;
 728         error = stm32prog_serial_get_buffer(data->buffer, &counter);
 729
 730         /* read checksum */
 731         if (!error) {
 732                 rcv = stm32prog_serial_getc_err();
 733                 error = !!(rcv < 0);
 734                 rcv_xor = rcv;
 735         }
 736
 737         if (error) {
 738                 printf("transmission error on packet %d, byte %d\n",
 739                        packet_number, codesize - counter);
 740                 /* waiting end of packet before flush & NACK */
 741                 mdelay(30);
 742                 data->packet_number--;
 743                 result = NACK_BYTE;
 744                 goto end;
 745         }
 746
 747         /* Compute Checksum */
 748         ramaddress = data->buffer;
 749         for (counter = codesize; counter != 0; counter--)
 750                 my_xor ^= *(ramaddress++);
 751
 752         /* If Checksum is incorrect */
 753         if (rcv_xor != my_xor) {
 754                 printf("checksum error on packet %d\n",
 755                        packet_number);
 756                 /* wait to be sure that all data are received
 757                  * in the FIFO before flush
 758                  */
 759                 mdelay(30);
 760                 data->packet_number--;
 761                 result = NACK_BYTE;
 762                 goto end;
 763         }
 764
 765         /* Update current position in buffer */
 766         data->cursor += codesize;
 767
 768         if (operation == PHASE_OTP) {
 769                 size = data->cursor - cursor;
 770                 /* no header for OTP */
 771                 if (stm32prog_otp_write(data, cursor,
 772                                         data->buffer, &size))
 773                         result = ABORT_BYTE;
 774                 goto end;
 775         }
 776
 777         if (operation == PHASE_PMIC) {
 778                 size = data->cursor - cursor;
 779                 /* no header for PMIC */
 780                 if (stm32prog_pmic_write(data, cursor,
 781                                          data->buffer, &size))
 782                         result = ABORT_BYTE;
 783                 goto end;
 784         }
 785
 786         if (cursor < BL_HEADER_SIZE) {
 787                 /* size = portion of header in this chunck */
 788                 if (data->cursor >= BL_HEADER_SIZE)
 789                         size = BL_HEADER_SIZE - cursor;
 790                 else
 791                         size = data->cursor - cursor;
 792                 memcpy((void *)((u32)(data->header_data) + cursor),
 793                        data->buffer, size);
 794                 cursor += size;
 795
 796                 if (cursor == BL_HEADER_SIZE) {
 797                         /* Check and Write the header */
 798                         if (stm32prog_header(data)) {
 799                                 result = ABORT_BYTE;
 800                                 goto end;
 801                         }
 802                 } else {
 803                         goto end;
 804                 }
 805         }
 806
 807         if (image_header->present) {
 808                 if (data->cursor <= BL_HEADER_SIZE)
 809                         goto end;
 810                 /* compute checksum on payload */
 811                 for (i = (unsigned long)size; i < codesize; i++)
 812                         data->checksum += data->buffer[i];
 813
 814                 if (data->cursor >
 815                     image_header->image_length + BL_HEADER_SIZE) {
 816                         pr_err("expected size exceeded\n");
 817                         result = ABORT_BYTE;
 818                         goto end;
 819                 }
 820
 821                 /* write data (payload) */
 822                 ret = stm32prog_write(data,
 823                                       &data->buffer[size],
 824                                       codesize - size);
 825         } else {
 826                 /* write all */
 827                 ret = stm32prog_write(data,
 828                                       data->buffer,
 829                                       codesize);
 830         }
 831         if (ret)
 832                 result = ABORT_BYTE;
 833
 834 end:
 835         stm32prog_serial_result(result);
 836 }
 837
 838 /**
 839  * read_partition() - Respond to read command
 840  *
 841  * Read data from not volatile memory, Flash
 842  *
 843  * @data:               Current command context
 844  */
 845 static void read_partition_command(struct stm32prog_data *data)
 846 {
 847         u32 i, part_id, codesize, offset = 0, rcv_data;
 848         long size;
 849         u8 tmp_xor;
 850         int res;
 851         u8 buffer[256];
 852
 853         part_id = stm32prog_serial_getc();
 854         tmp_xor = part_id;
 855
 856         offset = get_address(&tmp_xor);
 857
 858         rcv_data = stm32prog_serial_getc();
 859         if (rcv_data != tmp_xor) {
 860                 pr_debug("1st checksum received = %x, computed %x\n",
 861                          rcv_data, tmp_xor);
 862                 goto error;
 863         }
 864         stm32prog_serial_putc(ACK_BYTE);
 865
 866         /* NbrOfData to read = data + 1 */
 867         rcv_data = stm32prog_serial_getc();
 868         codesize = rcv_data + 0x01;
 869         tmp_xor = rcv_data;
 870
 871         rcv_data = stm32prog_serial_getc();
 872         if ((rcv_data ^ tmp_xor) != 0xFF) {
 873                 pr_debug("2nd checksum received = %x, computed %x\n",
 874                          rcv_data, tmp_xor);
 875                 goto error;
 876         }
 877
 878         pr_debug("%s : %x\n", __func__, part_id);
 879         rcv_data = 0;
 880         switch (part_id) {
 881         case PHASE_OTP:
 882                 size = codesize;
 883                 if (!stm32prog_otp_read(data, offset, buffer, &size))
 884                         rcv_data = size;
 885                 break;
 886         case PHASE_PMIC:
 887                 size = codesize;
 888                 if (!stm32prog_pmic_read(data, offset, buffer, &size))
 889                         rcv_data = size;
 890                 break;
 891         default:
 892                 res = stm32prog_read(data, part_id, offset,
 893                                      buffer, codesize);
 894                 if (res > 0)
 895                         rcv_data = res;
 896                 break;
 897         }
 898         if (rcv_data > 0) {
 899                 stm32prog_serial_putc(ACK_BYTE);
 900                 /*----------- Send data to the host -----------*/
 901                 for (i = 0; i < rcv_data; i++)
 902                         stm32prog_serial_putc(buffer[i]);
 903                 /*----------- Send filler to the host -----------*/
 904                 for (; i < codesize; i++)
 905                         stm32prog_serial_putc(0x0);
 906                 return;
 907         }
 908         stm32prog_serial_result(ABORT_BYTE);
 909         return;
 910
 911 error:
 912         stm32prog_serial_result(NACK_BYTE);
 913 }
 914
 915 /* MAIN function = SERIAL LOOP ***********************************************/
 916
 917 /**
 918  * stm32prog_serial_loop() - USART bootloader Loop routine
 919  *
 920  * @data:               Current command context
 921  * @return true if reset is needed after loop
 922  */
 923 bool stm32prog_serial_loop(struct stm32prog_data *data)
 924 {
 925         u32 counter = 0x0;
 926         u8 command = 0x0;
 927         u8 found;
 928         int phase = data->phase;
 929
 930         /* element of cmd_func need to aligned with cmd_id[]*/
 931         void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
 932                 /* GET_CMD_COMMAND */   get_cmd_command,
 933                 /* GET_VER_COMMAND */   get_version_command,
 934                 /* GET_ID_COMMAND */    get_id_command,
 935                 /* GET_PHASE_COMMAND */ get_phase_command,
 936                 /* RM_COMMAND */        read_memory_command,
 937                 /* READ_PART_COMMAND */ read_partition_command,
 938                 /* START_COMMAND */     start_command,
 939                 /* DOWNLOAD_COMMAND */  download_command
 940         };
 941
 942         /* flush and NACK pending command received during u-boot init
 943          * request command reemit
 944          */
 945         stm32prog_serial_result(NACK_BYTE);
 946
 947         clear_ctrlc(); /* forget any previous Control C */
 948         while (!had_ctrlc()) {
 949                 phase = data->phase;
 950
 951                 if (phase == PHASE_DO_RESET)
 952                         return true;
 953
 954                 /* Get the user command: read first byte */
 955                 command = stm32prog_serial_getc();
 956
 957                 if (command == INIT_BYTE) {
 958                         puts("\nConnected\n");
 959                         stm32prog_serial_result(ACK_BYTE);
 960                         continue;
 961                 }
 962
 963                 found = 0;
 964                 for (counter = 0; counter < NB_CMD; counter++)
 965                         if (cmd_id[counter] == command) {
 966                                 found = 1;
 967                                 break;
 968                         }
 969                 if (found)
 970                         if ((command ^ stm32prog_serial_getc()) != 0xFF)
 971                                 found = 0;
 972                 if (!found) {
 973                         /* wait to be sure that all data are received
 974                          * in the FIFO before flush (CMD and XOR)
 975                          */
 976                         mdelay(3);
 977                         stm32prog_serial_result(NACK_BYTE);
 978                 } else {
 979                         stm32prog_serial_result(ACK_BYTE);
 980                         cmd_func[counter](data);
 981                 }
 982                 WATCHDOG_RESET();
 983         }
 984
 985         /* clean device */
 986         if (gd->cur_serial_dev == down_serial_dev) {
 987                 /* restore console on uart */
 988                 gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
 989         }
 990         down_serial_dev = NULL;
 991
 992         return false; /* no reset after ctrlc */
 993 }