1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
13 #include <asm/arch/stm32mp1_smc.h>
14 #include <dm/uclass.h>
15 #include <jffs2/load_kernel.h>
16 #include <linux/list.h>
17 #include <linux/list_sort.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/sizes.h>
21 #include "stm32prog.h"
23 /* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
24 #define GPT_HEADER_SZ 34
26 #define OPT_SELECT BIT(0)
27 #define OPT_EMPTY BIT(1)
28 #define OPT_DELETE BIT(2)
30 #define IS_SELECT(part) ((part)->option & OPT_SELECT)
31 #define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
32 #define IS_DELETE(part) ((part)->option & OPT_DELETE)
34 #define ALT_BUF_LEN SZ_1K
36 #define ROOTFS_MMC0_UUID \
37 EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
38 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
40 #define ROOTFS_MMC1_UUID \
41 EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
42 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
44 #define ROOTFS_MMC2_UUID \
45 EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
46 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
48 /* RAW parttion (binary / bootloader) used Linux - reserved UUID */
49 #define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
52 * unique partition guid (uuid) for partition named "rootfs"
53 * on each MMC instance = SD Card or eMMC
54 * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
56 static const efi_guid_t uuid_mmc[3] = {
62 DECLARE_GLOBAL_DATA_PTR;
64 /* order of column in flash layout file */
65 enum stm32prog_col_t {
75 /* partition handling routines : CONFIG_CMD_MTDPARTS */
76 int mtdparts_init(void);
77 int find_dev_and_part(const char *id, struct mtd_device **dev,
78 u8 *part_num, struct part_info **part);
80 char *stm32prog_get_error(struct stm32prog_data *data)
82 static const char error_msg[] = "Unspecified";
84 if (strlen(data->error) == 0)
85 strcpy(data->error, error_msg);
90 u8 stm32prog_header_check(struct raw_header_s *raw_header,
91 struct image_header_s *header)
96 header->image_checksum = 0x0;
97 header->image_length = 0x0;
99 if (!raw_header || !header) {
100 pr_debug("%s:no header data\n", __func__);
103 if (raw_header->magic_number !=
104 (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
105 pr_debug("%s:invalid magic number : 0x%x\n",
106 __func__, raw_header->magic_number);
109 /* only header v1.0 supported */
110 if (raw_header->header_version != 0x00010000) {
111 pr_debug("%s:invalid header version : 0x%x\n",
112 __func__, raw_header->header_version);
115 if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
116 pr_debug("%s:invalid reserved field\n", __func__);
119 for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
120 if (raw_header->padding[i] != 0) {
121 pr_debug("%s:invalid padding field\n", __func__);
126 header->image_checksum = le32_to_cpu(raw_header->image_checksum);
127 header->image_length = le32_to_cpu(raw_header->image_length);
132 static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
137 /* compute checksum on payload */
138 payload = (u8 *)addr;
140 for (i = header->image_length; i > 0; i--)
141 checksum += *(payload++);
146 /* FLASHLAYOUT PARSING *****************************************/
147 static int parse_option(struct stm32prog_data *data,
148 int i, char *p, struct stm32prog_part_t *part)
160 part->option |= OPT_SELECT;
163 part->option |= OPT_EMPTY;
166 part->option |= OPT_DELETE;
170 stm32prog_err("Layout line %d: invalid option '%c' in %s)",
176 if (!(part->option & OPT_SELECT)) {
177 stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
184 static int parse_id(struct stm32prog_data *data,
185 int i, char *p, struct stm32prog_part_t *part)
190 result = strict_strtoul(p, 0, &value);
192 if (result || value > PHASE_LAST_USER) {
193 stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
200 static int parse_name(struct stm32prog_data *data,
201 int i, char *p, struct stm32prog_part_t *part)
205 if (strlen(p) < sizeof(part->name)) {
206 strcpy(part->name, p);
208 stm32prog_err("Layout line %d: partition name too long [%d]: %s",
216 static int parse_type(struct stm32prog_data *data,
217 int i, char *p, struct stm32prog_part_t *part)
223 if (!strncmp(p, "Binary", 6)) {
224 part->part_type = PART_BINARY;
226 /* search for Binary(X) case */
236 simple_strtoul(&p[7], NULL, 10);
238 } else if (!strcmp(p, "System")) {
239 part->part_type = PART_SYSTEM;
240 } else if (!strcmp(p, "FileSystem")) {
241 part->part_type = PART_FILESYSTEM;
242 } else if (!strcmp(p, "RawImage")) {
243 part->part_type = RAW_IMAGE;
248 stm32prog_err("Layout line %d: type parsing error : '%s'",
254 static int parse_ip(struct stm32prog_data *data,
255 int i, char *p, struct stm32prog_part_t *part)
258 unsigned int len = 0;
261 if (!strcmp(p, "none")) {
262 part->target = STM32PROG_NONE;
263 } else if (!strncmp(p, "mmc", 3)) {
264 part->target = STM32PROG_MMC;
266 } else if (!strncmp(p, "nor", 3)) {
267 part->target = STM32PROG_NOR;
269 } else if (!strncmp(p, "nand", 4)) {
270 part->target = STM32PROG_NAND;
272 } else if (!strncmp(p, "spi-nand", 8)) {
273 part->target = STM32PROG_SPI_NAND;
279 /* only one digit allowed for device id */
280 if (strlen(p) != len + 1) {
283 part->dev_id = p[len] - '0';
284 if (part->dev_id > 9)
289 stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
294 static int parse_offset(struct stm32prog_data *data,
295 int i, char *p, struct stm32prog_part_t *part)
303 /* eMMC boot parttion */
304 if (!strncmp(p, "boot", 4)) {
305 if (strlen(p) != 5) {
310 else if (p[4] == '2')
316 stm32prog_err("Layout line %d: invalid part '%s'",
319 part->addr = simple_strtoull(p, &tail, 0);
320 if (tail == p || *tail != '\0') {
321 stm32prog_err("Layout line %d: invalid offset '%s'",
331 int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
332 struct stm32prog_part_t *part) = {
333 [COL_OPTION] = parse_option,
335 [COL_NAME] = parse_name,
336 [COL_TYPE] = parse_type,
338 [COL_OFFSET] = parse_offset,
341 static int parse_flash_layout(struct stm32prog_data *data,
345 int column = 0, part_nb = 0, ret;
346 bool end_of_line, eof;
347 char *p, *start, *last, *col;
348 struct stm32prog_part_t *part;
354 /* check if STM32image is detected */
355 if (!stm32prog_header_check((struct raw_header_s *)addr,
359 addr = addr + BL_HEADER_SIZE;
360 size = data->header.image_length;
362 checksum = stm32prog_header_checksum(addr, &data->header);
363 if (checksum != data->header.image_checksum) {
364 stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
365 checksum, data->header.image_checksum);
372 start = (char *)addr;
375 *last = 0x0; /* force null terminated string */
376 pr_debug("flash layout =\n%s\n", start);
378 /* calculate expected number of partitions */
381 while (*p && (p < last)) {
384 if (p < last && *p == '#')
388 if (part_list_size > PHASE_LAST_USER) {
389 stm32prog_err("Layout: too many partition (%d)",
393 part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
395 stm32prog_err("Layout: alloc failed");
398 data->part_array = part;
400 /* main parsing loop */
404 col = start; /* 1st column */
408 /* CR is ignored and replaced by NULL character */
423 /* comment line is skipped */
424 if (column == 0 && p == col) {
425 while ((p < last) && *p)
430 if (p >= last || !*p) {
437 /* by default continue with the next character */
443 /* replace by \0: allow string parsing for each column */
451 /* skip empty line and multiple TAB in tsv file */
452 if (strlen(col) == 0) {
454 /* skip empty line */
455 if (column == 0 && end_of_line) {
462 if (column < COL_NB_STM32) {
463 ret = parse[column](data, i, col, part);
468 /* save the beginning of the next column */
475 /* end of the line detected */
478 if (column < COL_NB_STM32) {
479 stm32prog_err("Layout line %d: no enought column", i);
486 if (part_nb >= part_list_size) {
489 stm32prog_err("Layout: no enought memory for %d part",
495 data->part_nb = part_nb;
496 if (data->part_nb == 0) {
497 stm32prog_err("Layout: no partition found");
504 static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
506 struct stm32prog_part_t *parta, *partb;
508 parta = container_of(a, struct stm32prog_part_t, list);
509 partb = container_of(b, struct stm32prog_part_t, list);
511 if (parta->part_id != partb->part_id)
512 return parta->part_id - partb->part_id;
514 return parta->addr > partb->addr ? 1 : -1;
517 static void get_mtd_by_target(char *string, enum stm32prog_target target,
529 case STM32PROG_SPI_NAND:
530 dev_str = "spi-nand";
536 sprintf(string, "%s%d", dev_str, dev_id);
539 static int init_device(struct stm32prog_data *data,
540 struct stm32prog_dev_t *dev)
542 struct mmc *mmc = NULL;
543 struct blk_desc *block_dev = NULL;
545 struct mtd_info *mtd = NULL;
550 u64 first_addr = 0, last_addr = 0;
551 struct stm32prog_part_t *part, *next_part;
552 u64 part_addr, part_size;
554 const char *part_name;
556 switch (dev->target) {
559 mmc = find_mmc_device(dev->dev_id);
561 stm32prog_err("mmc device %d not found", dev->dev_id);
564 block_dev = mmc_get_blk_desc(mmc);
566 stm32prog_err("mmc device %d not probed", dev->dev_id);
569 dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
572 /* reserve a full erase group for each GTP headers */
573 if (mmc->erase_grp_size > GPT_HEADER_SZ) {
574 first_addr = dev->erase_size;
575 last_addr = (u64)(block_dev->lba -
576 mmc->erase_grp_size) *
579 first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
580 last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
583 pr_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
584 block_dev->lba, block_dev->blksz);
585 pr_debug(" available address = 0x%llx..0x%llx\n",
586 first_addr, last_addr);
587 pr_debug(" full_update = %d\n", dev->full_update);
593 case STM32PROG_SPI_NAND:
594 get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
595 pr_debug("%s\n", mtd_id);
598 mtd = get_mtd_device_nm(mtd_id);
600 stm32prog_err("MTD device %s not found", mtd_id);
604 last_addr = mtd->size;
605 dev->erase_size = mtd->erasesize;
606 pr_debug("MTD device %s: size=%lld erasesize=%d\n",
607 mtd_id, mtd->size, mtd->erasesize);
608 pr_debug(" available address = 0x%llx..0x%llx\n",
609 first_addr, last_addr);
614 stm32prog_err("unknown device type = %d", dev->target);
617 pr_debug(" erase size = 0x%x\n", dev->erase_size);
618 pr_debug(" full_update = %d\n", dev->full_update);
620 /* order partition list in offset order */
621 list_sort(NULL, &dev->part_list, &part_cmp);
623 pr_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
624 list_for_each_entry(part, &dev->part_list, list) {
625 if (part->bin_nb > 1) {
626 if ((dev->target != STM32PROG_NAND &&
627 dev->target != STM32PROG_SPI_NAND) ||
628 part->id >= PHASE_FIRST_USER ||
629 strncmp(part->name, "fsbl", 4)) {
630 stm32prog_err("%s (0x%x): multiple binary %d not supported",
631 part->name, part->id,
636 if (part->part_type == RAW_IMAGE) {
640 part->size = block_dev->lba * block_dev->blksz;
642 part->size = last_addr;
643 pr_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
644 part->option, part->id, part->name,
645 part->part_type, part->bin_nb, part->target,
646 part->dev_id, part->addr, part->size);
649 if (part->part_id < 0) { /* boot hw partition for eMMC */
651 part->size = mmc->capacity_boot;
653 stm32prog_err("%s (0x%x): hw partition not expected : %d",
654 part->name, part->id,
659 part->part_id = part_id++;
661 /* last partition : size to the end of the device */
662 if (part->list.next != &dev->part_list) {
664 container_of(part->list.next,
665 struct stm32prog_part_t,
667 if (part->addr < next_part->addr) {
668 part->size = next_part->addr -
671 stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
672 part->name, part->id,
680 if (part->addr <= last_addr) {
681 part->size = last_addr - part->addr;
683 stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
684 part->name, part->id,
685 part->addr, last_addr);
689 if (part->addr < first_addr) {
690 stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
691 part->name, part->id,
692 part->addr, first_addr);
696 if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
697 stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
698 part->name, part->id, part->addr,
699 part->dev->erase_size);
702 pr_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
703 part->part_id, part->option, part->id, part->name,
704 part->part_type, part->bin_nb, part->target,
705 part->dev_id, part->addr, part->size);
711 /* check coherency with existing partition */
714 * block devices with GPT: check user partition size
715 * only for partial update, the GPT partions are be
716 * created for full update
718 if (dev->full_update || part->part_id < 0) {
722 disk_partition_t partinfo;
724 ret = part_get_info(block_dev, part->part_id,
728 stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
729 part->name, part->id,
730 part_id, part->dev_id);
733 part_addr = (u64)partinfo.start * partinfo.blksz;
734 part_size = (u64)partinfo.size * partinfo.blksz;
735 part_name = (char *)partinfo.name;
741 char mtd_part_id[32];
742 struct part_info *mtd_part;
743 struct mtd_device *mtd_dev;
746 sprintf(mtd_part_id, "%s,%d", mtd_id,
748 ret = find_dev_and_part(mtd_part_id, &mtd_dev,
749 &part_num, &mtd_part);
751 stm32prog_err("%s (0x%x): Invalid MTD partition %s",
752 part->name, part->id,
756 part_addr = mtd_part->offset;
757 part_size = mtd_part->size;
758 part_name = mtd_part->name;
763 stm32prog_err("%s (0x%x): Invalid partition",
764 part->name, part->id);
769 pr_debug(" %08llx %08llx\n", part_addr, part_size);
771 if (part->addr != part_addr) {
772 stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
773 part->name, part->id, part->part_id,
774 part_name, part->addr, part_addr);
777 if (part->size != part_size) {
778 stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
779 part->name, part->id, part->part_id,
780 part_name, part->addr, part->size,
788 static int treat_partition_list(struct stm32prog_data *data)
791 struct stm32prog_part_t *part;
793 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
794 data->dev[j].target = STM32PROG_NONE;
795 INIT_LIST_HEAD(&data->dev[j].part_list);
798 data->tee_detected = false;
799 data->fsbl_nor_detected = false;
800 for (i = 0; i < data->part_nb; i++) {
801 part = &data->part_array[i];
804 /* skip partition with IP="none" */
805 if (part->target == STM32PROG_NONE) {
806 if (IS_SELECT(part)) {
807 stm32prog_err("Layout: selected none phase = 0x%x",
814 if (part->id == PHASE_FLASHLAYOUT ||
815 part->id > PHASE_LAST_USER) {
816 stm32prog_err("Layout: invalid phase = 0x%x",
820 for (j = i + 1; j < data->part_nb; j++) {
821 if (part->id == data->part_array[j].id) {
822 stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
827 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
828 if (data->dev[j].target == STM32PROG_NONE) {
829 /* new device found */
830 data->dev[j].target = part->target;
831 data->dev[j].dev_id = part->dev_id;
832 data->dev[j].full_update = true;
835 } else if ((part->target == data->dev[j].target) &&
836 (part->dev_id == data->dev[j].dev_id)) {
840 if (j == STM32PROG_MAX_DEV) {
841 stm32prog_err("Layout: too many device");
844 switch (part->target) {
846 if (!data->fsbl_nor_detected &&
847 !strncmp(part->name, "fsbl", 4))
848 data->fsbl_nor_detected = true;
851 case STM32PROG_SPI_NAND:
852 if (!data->tee_detected &&
853 !strncmp(part->name, "tee", 3))
854 data->tee_detected = true;
859 part->dev = &data->dev[j];
860 if (!IS_SELECT(part))
861 part->dev->full_update = false;
862 list_add_tail(&part->list, &data->dev[j].part_list);
868 static int create_partitions(struct stm32prog_data *data)
872 const int buflen = SZ_8K;
874 char uuid[UUID_STR_LEN + 1];
875 unsigned char *uuid_bin;
879 struct stm32prog_part_t *part;
881 buf = malloc(buflen);
885 puts("partitions : ");
886 /* initialize the selected device */
887 for (i = 0; i < data->dev_nb; i++) {
888 /* create gpt partition support only for full update on MMC */
889 if (data->dev[i].target != STM32PROG_MMC ||
890 !data->dev[i].full_update)
894 rootfs_found = false;
895 memset(buf, 0, buflen);
897 list_for_each_entry(part, &data->dev[i].part_list, list) {
898 /* skip eMMC boot partitions */
899 if (part->part_id < 0)
902 if (part->part_type == RAW_IMAGE)
905 if (offset + 100 > buflen) {
906 pr_debug("\n%s: buffer too small, %s skippped",
907 __func__, part->name);
912 offset += sprintf(buf, "gpt write mmc %d \"",
913 data->dev[i].dev_id);
915 offset += snprintf(buf + offset, buflen - offset,
916 "name=%s,start=0x%llx,size=0x%llx",
921 if (part->part_type == PART_BINARY)
922 offset += snprintf(buf + offset,
925 LINUX_RESERVED_UUID);
927 offset += snprintf(buf + offset,
931 if (part->part_type == PART_SYSTEM)
932 offset += snprintf(buf + offset,
936 if (!rootfs_found && !strcmp(part->name, "rootfs")) {
937 mmc_id = part->dev_id;
939 if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
941 (unsigned char *)uuid_mmc[mmc_id].b;
942 uuid_bin_to_str(uuid_bin, uuid,
943 UUID_STR_FORMAT_GUID);
944 offset += snprintf(buf + offset,
950 offset += snprintf(buf + offset, buflen - offset, ";");
954 offset += snprintf(buf + offset, buflen - offset, "\"");
955 pr_debug("\ncmd: %s\n", buf);
956 if (run_command(buf, 0)) {
957 stm32prog_err("GPT partitionning fail: %s",
965 if (data->dev[i].mmc)
966 part_init(mmc_get_blk_desc(data->dev[i].mmc));
969 sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
970 pr_debug("\ncmd: %s", buf);
971 if (run_command(buf, 0))
976 sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
983 run_command("mtd list", 0);
991 static int stm32prog_alt_add(struct stm32prog_data *data,
992 struct dfu_entity *dfu,
993 struct stm32prog_part_t *part)
999 char buf[ALT_BUF_LEN];
1001 char multiplier, type;
1003 /* max 3 digit for sector size */
1004 if (part->size > SZ_1M) {
1005 size = (u32)(part->size / SZ_1M);
1007 } else if (part->size > SZ_1K) {
1008 size = (u32)(part->size / SZ_1K);
1011 size = (u32)part->size;
1014 if (IS_SELECT(part) && !IS_EMPTY(part))
1015 type = 'e'; /*Readable and Writeable*/
1017 type = 'a';/*Readable*/
1019 memset(buf, 0, sizeof(buf));
1020 offset = snprintf(buf, ALT_BUF_LEN - offset,
1021 "@%s/0x%02x/1*%d%c%c ",
1022 part->name, part->id,
1023 size, multiplier, type);
1025 if (part->part_type == RAW_IMAGE) {
1028 if (part->dev->target == STM32PROG_MMC)
1029 dfu_size = part->size / part->dev->mmc->read_bl_len;
1031 dfu_size = part->size;
1032 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1033 "raw 0x0 0x%llx", dfu_size);
1034 } else if (part->part_id < 0) {
1035 u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
1037 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1038 "raw 0x%llx 0x%llx",
1039 part->addr, nb_blk);
1040 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1041 " mmcpart %d;", -(part->part_id));
1043 if (part->part_type == PART_SYSTEM &&
1044 (part->target == STM32PROG_NAND ||
1045 part->target == STM32PROG_NOR ||
1046 part->target == STM32PROG_SPI_NAND))
1047 offset += snprintf(buf + offset,
1048 ALT_BUF_LEN - offset,
1051 offset += snprintf(buf + offset,
1052 ALT_BUF_LEN - offset,
1054 /* dev_id requested by DFU MMC */
1055 if (part->target == STM32PROG_MMC)
1056 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1057 " %d", part->dev_id);
1058 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1059 " %d;", part->part_id);
1061 switch (part->target) {
1064 sprintf(dfustr, "mmc");
1065 sprintf(devstr, "%d", part->dev_id);
1069 case STM32PROG_NAND:
1071 case STM32PROG_SPI_NAND:
1072 sprintf(dfustr, "mtd");
1073 get_mtd_by_target(devstr, part->target, part->dev_id);
1077 stm32prog_err("invalid target: %d", part->target);
1080 pr_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
1081 ret = dfu_alt_add(dfu, dfustr, devstr, buf);
1082 pr_debug("dfu_alt_add(%s,%s,%s) result %d\n",
1083 dfustr, devstr, buf, ret);
1088 static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
1089 char *name, int phase, int size)
1093 char buf[ALT_BUF_LEN];
1095 sprintf(devstr, "%d", phase);
1096 sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
1097 ret = dfu_alt_add(dfu, "virt", devstr, buf);
1098 pr_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
1103 static int dfu_init_entities(struct stm32prog_data *data)
1106 int phase, i, alt_id;
1107 struct stm32prog_part_t *part;
1108 struct dfu_entity *dfu;
1111 alt_nb = 3; /* number of virtual = CMD, OTP, PMIC*/
1112 if (data->part_nb == 0)
1113 alt_nb++; /* +1 for FlashLayout */
1115 for (i = 0; i < data->part_nb; i++) {
1116 if (data->part_array[i].target != STM32PROG_NONE)
1120 if (dfu_alt_init(alt_nb, &dfu))
1123 puts("DFU alt info setting: ");
1124 if (data->part_nb) {
1127 (phase <= PHASE_LAST_USER) &&
1128 (alt_id < alt_nb) && !ret;
1130 /* ordering alt setting by phase id */
1132 for (i = 0; i < data->part_nb; i++) {
1133 if (phase == data->part_array[i].id) {
1134 part = &data->part_array[i];
1140 if (part->target == STM32PROG_NONE)
1142 part->alt_id = alt_id;
1145 ret = stm32prog_alt_add(data, dfu, part);
1148 char buf[ALT_BUF_LEN];
1150 sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
1151 PHASE_FLASHLAYOUT, STM32_DDR_BASE);
1152 ret = dfu_alt_add(dfu, "ram", NULL, buf);
1153 pr_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
1157 ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, 512);
1160 ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, 512);
1162 if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
1163 ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, 8);
1166 stm32prog_err("dfu init failed: %d", ret);
1170 dfu_show_entities();
1175 int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1178 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1180 if (!data->otp_part) {
1181 data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1182 if (!data->otp_part)
1187 memset(data->otp_part, 0, OTP_SIZE);
1189 if (offset + *size > OTP_SIZE)
1190 *size = OTP_SIZE - offset;
1192 memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
1197 int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1200 #ifndef CONFIG_ARM_SMCCC
1201 stm32prog_err("OTP update not supported");
1207 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1208 /* alway read for first packet */
1210 if (!data->otp_part)
1212 memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1214 if (!data->otp_part) {
1219 /* init struct with 0 */
1220 memset(data->otp_part, 0, OTP_SIZE);
1222 /* call the service */
1223 result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
1224 (u32)data->otp_part, 0);
1229 if (!data->otp_part) {
1234 if (offset + *size > OTP_SIZE)
1235 *size = OTP_SIZE - offset;
1236 memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
1239 pr_debug("%s: result %i\n", __func__, result);
1245 int stm32prog_otp_start(struct stm32prog_data *data)
1247 #ifndef CONFIG_ARM_SMCCC
1248 stm32prog_err("OTP update not supported");
1253 struct arm_smccc_res res;
1255 if (!data->otp_part) {
1256 stm32prog_err("start OTP without data");
1260 arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
1261 (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
1269 stm32prog_err("Provisioning");
1273 pr_err("%s: OTP incorrect value (err = %ld)\n",
1279 pr_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
1280 __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
1284 free(data->otp_part);
1285 data->otp_part = NULL;
1286 pr_debug("%s: result %i\n", __func__, result);
1292 int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1295 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1298 memset(data->pmic_part, 0, PMIC_SIZE);
1300 if (offset + *size > PMIC_SIZE)
1301 *size = PMIC_SIZE - offset;
1303 memcpy(&data->pmic_part[offset], buffer, *size);
1308 int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1311 int result = 0, ret;
1312 struct udevice *dev;
1314 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1315 stm32prog_err("PMIC update not supported");
1320 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1321 ret = uclass_get_device_by_driver(UCLASS_MISC,
1322 DM_GET_DRIVER(stpmic1_nvm),
1327 /* alway request PMIC for first packet */
1329 /* init struct with 0 */
1330 memset(data->pmic_part, 0, PMIC_SIZE);
1332 ret = uclass_get_device_by_driver(UCLASS_MISC,
1333 DM_GET_DRIVER(stpmic1_nvm),
1338 ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1343 if (ret != PMIC_SIZE) {
1349 if (offset + *size > PMIC_SIZE)
1350 *size = PMIC_SIZE - offset;
1352 memcpy(buffer, &data->pmic_part[offset], *size);
1355 pr_debug("%s: result %i\n", __func__, result);
1359 int stm32prog_pmic_start(struct stm32prog_data *data)
1362 struct udevice *dev;
1364 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1365 stm32prog_err("PMIC update not supported");
1370 ret = uclass_get_device_by_driver(UCLASS_MISC,
1371 DM_GET_DRIVER(stpmic1_nvm),
1376 return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1379 /* copy FSBL on NAND to improve reliability on NAND */
1380 static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
1384 struct image_header_s header;
1385 struct raw_header_s raw_header;
1386 struct dfu_entity *dfu;
1389 if (part->target != STM32PROG_NAND &&
1390 part->target != STM32PROG_SPI_NAND)
1393 dfu = dfu_get_entity(part->alt_id);
1396 dfu_transaction_cleanup(dfu);
1397 size = BL_HEADER_SIZE;
1398 ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
1401 if (stm32prog_header_check(&raw_header, &header))
1404 /* read header + payload */
1405 size = header.image_length + BL_HEADER_SIZE;
1406 size = round_up(size, part->dev->mtd->erasesize);
1407 fsbl = calloc(1, size);
1410 ret = dfu->read_medium(dfu, 0, fsbl, &size);
1411 pr_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
1415 dfu_transaction_cleanup(dfu);
1417 for (i = part->bin_nb - 1; i > 0; i--) {
1419 /* write to the next erase block */
1420 ret = dfu->write_medium(dfu, offset, fsbl, &size);
1421 pr_debug("%s copy at ofset=%lx size=%lx ret=%d",
1422 __func__, offset, size, ret);
1432 static void stm32prog_end_phase(struct stm32prog_data *data)
1434 if (data->phase == PHASE_FLASHLAYOUT) {
1435 if (parse_flash_layout(data, STM32_DDR_BASE, 0))
1436 stm32prog_err("Layout: invalid FlashLayout");
1440 if (!data->cur_part)
1443 if (CONFIG_IS_ENABLED(MMC) &&
1444 data->cur_part->part_id < 0) {
1447 sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
1448 data->cur_part->dev_id, data->cur_part->dev_id,
1449 -(data->cur_part->part_id));
1450 if (run_command(cmdbuf, 0)) {
1451 stm32prog_err("commands '%s' failed", cmdbuf);
1456 if (CONFIG_IS_ENABLED(MTD) &&
1457 data->cur_part->bin_nb > 1) {
1458 if (stm32prog_copy_fsbl(data->cur_part)) {
1459 stm32prog_err("%s (0x%x): copy of fsbl failed",
1460 data->cur_part->name, data->cur_part->id);
1466 void stm32prog_do_reset(struct stm32prog_data *data)
1468 if (data->phase == PHASE_RESET) {
1469 data->phase = PHASE_DO_RESET;
1470 puts("Reset requested\n");
1474 void stm32prog_next_phase(struct stm32prog_data *data)
1477 struct stm32prog_part_t *part;
1480 phase = data->phase;
1484 case PHASE_DO_RESET:
1488 /* found next selected partition */
1489 data->cur_part = NULL;
1490 data->phase = PHASE_END;
1494 if (phase > PHASE_LAST_USER)
1496 for (i = 0; i < data->part_nb; i++) {
1497 part = &data->part_array[i];
1498 if (part->id == phase) {
1499 if (IS_SELECT(part) && !IS_EMPTY(part)) {
1500 data->cur_part = part;
1501 data->phase = phase;
1509 if (data->phase == PHASE_END)
1510 puts("Phase=END\n");
1513 static int part_delete(struct stm32prog_data *data,
1514 struct stm32prog_part_t *part)
1518 unsigned long blks, blks_offset, blks_size;
1519 struct blk_desc *block_dev = NULL;
1526 printf("Erasing %s ", part->name);
1527 switch (part->target) {
1530 printf("on mmc %d: ", part->dev->dev_id);
1531 block_dev = mmc_get_blk_desc(part->dev->mmc);
1532 blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
1533 blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
1534 /* -1 or -2 : delete boot partition of MMC
1535 * need to switch to associated hwpart 1 or 2
1537 if (part->part_id < 0)
1538 if (blk_select_hwpart_devnum(IF_TYPE_MMC,
1543 blks = blk_derase(block_dev, blks_offset, blks_size);
1545 /* return to user partition */
1546 if (part->part_id < 0)
1547 blk_select_hwpart_devnum(IF_TYPE_MMC,
1548 part->dev->dev_id, 0);
1549 if (blks != blks_size) {
1551 stm32prog_err("%s (0x%x): MMC erase failed",
1552 part->name, part->id);
1558 case STM32PROG_NAND:
1559 case STM32PROG_SPI_NAND:
1560 get_mtd_by_target(devstr, part->target, part->dev->dev_id);
1561 printf("on %s: ", devstr);
1562 sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
1563 devstr, part->addr, part->size);
1564 if (run_command(cmdbuf, 0)) {
1566 stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
1567 part->name, part->id, cmdbuf);
1573 stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
1582 static void stm32prog_devices_init(struct stm32prog_data *data)
1586 struct stm32prog_part_t *part;
1588 ret = treat_partition_list(data);
1592 /* initialize the selected device */
1593 for (i = 0; i < data->dev_nb; i++) {
1594 ret = init_device(data, &data->dev[i]);
1599 /* delete RAW partition before create partition */
1600 for (i = 0; i < data->part_nb; i++) {
1601 part = &data->part_array[i];
1603 if (part->part_type != RAW_IMAGE)
1606 if (!IS_SELECT(part) || !IS_DELETE(part))
1609 ret = part_delete(data, part);
1614 ret = create_partitions(data);
1618 /* delete partition GPT or MTD */
1619 for (i = 0; i < data->part_nb; i++) {
1620 part = &data->part_array[i];
1622 if (part->part_type == RAW_IMAGE)
1625 if (!IS_SELECT(part) || !IS_DELETE(part))
1628 ret = part_delete(data, part);
1639 int stm32prog_dfu_init(struct stm32prog_data *data)
1641 /* init device if no error */
1643 stm32prog_devices_init(data);
1646 stm32prog_next_phase(data);
1648 /* prepare DFU for device read/write */
1649 dfu_free_entities();
1650 return dfu_init_entities(data);
1653 int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
1655 memset(data, 0x0, sizeof(*data));
1656 data->phase = PHASE_FLASHLAYOUT;
1658 return parse_flash_layout(data, addr, size);
1661 void stm32prog_clean(struct stm32prog_data *data)
1664 dfu_free_entities();
1665 free(data->part_array);
1666 free(data->otp_part);
1667 free(data->header_data);
1670 /* DFU callback: used after serial and direct DFU USB access */
1671 void dfu_flush_callback(struct dfu_entity *dfu)
1673 if (!stm32prog_data)
1676 if (dfu->dev_type == DFU_DEV_VIRT) {
1677 if (dfu->data.virt.dev_num == PHASE_OTP)
1678 stm32prog_otp_start(stm32prog_data);
1679 else if (dfu->data.virt.dev_num == PHASE_PMIC)
1680 stm32prog_pmic_start(stm32prog_data);
1684 if (dfu->dev_type == DFU_DEV_RAM) {
1685 if (dfu->alt == 0 &&
1686 stm32prog_data->phase == PHASE_FLASHLAYOUT) {
1687 stm32prog_end_phase(stm32prog_data);
1688 /* waiting DFU DETACH for reenumeration */
1692 if (!stm32prog_data->cur_part)
1695 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1696 stm32prog_end_phase(stm32prog_data);
1697 stm32prog_next_phase(stm32prog_data);
1701 void dfu_initiated_callback(struct dfu_entity *dfu)
1703 if (!stm32prog_data)
1706 if (!stm32prog_data->cur_part)
1709 /* force the saved offset for the current partition */
1710 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1711 dfu->offset = stm32prog_data->offset;
1712 pr_debug("dfu offset = 0x%llx\n", dfu->offset);