arch/arm/mach-socfpga/clock_manager.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
   4  */
   5
   6 #include <common.h>
   7 #include <wait_bit.h>
   8 #include <asm/io.h>
   9 #include <asm/arch/clock_manager.h>
  10
  11 DECLARE_GLOBAL_DATA_PTR;
  12
  13 void cm_wait_for_lock(u32 mask)
  14 {
  15         u32 inter_val;
  16         u32 retry = 0;
  17         do {
  18 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
  19                 inter_val = readl(socfpga_get_clkmgr_addr() +
  20                                   CLKMGR_INTER) & mask;
  21 #else
  22                 inter_val = readl(socfpga_get_clkmgr_addr() +
  23                                   CLKMGR_STAT) & mask;
  24 #endif
  25                 /* Wait for stable lock */
  26                 if (inter_val == mask)
  27                         retry++;
  28                 else
  29                         retry = 0;
  30                 if (retry >= 10)
  31                         break;
  32         } while (1);
  33 }
  34
  35 /* function to poll in the fsm busy bit */
  36 int cm_wait_for_fsm(void)
  37 {
  38         return wait_for_bit_le32((const void *)(socfpga_get_clkmgr_addr() +
  39                                  CLKMGR_STAT), CLKMGR_STAT_BUSY, false, 20000,
  40                                  false);
  41 }
  42
  43 int set_cpu_clk_info(void)
  44 {
  45 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
  46         /* Calculate the clock frequencies required for drivers */
  47         cm_get_l4_sp_clk_hz();
  48         cm_get_mmc_controller_clk_hz();
  49 #endif
  50
  51         gd->bd->bi_arm_freq = cm_get_mpu_clk_hz() / 1000000;
  52         gd->bd->bi_dsp_freq = 0;
  53
  54 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
  55         gd->bd->bi_ddr_freq = cm_get_sdram_clk_hz() / 1000000;
  56 #else
  57         gd->bd->bi_ddr_freq = 0;
  58 #endif
  59
  60         return 0;
  61 }
  62
  63 #ifndef CONFIG_SPL_BUILD
  64 static int do_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  65 {
  66         cm_print_clock_quick_summary();
  67         return 0;
  68 }
  69
  70 U_BOOT_CMD(
  71         clocks, CONFIG_SYS_MAXARGS, 1, do_showclocks,
  72         "display clocks",
  73         ""
  74 );
  75 #endif