arch/arm/mach-rockchip/spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include <common.h>
   7 #include <debug_uart.h>
   8 #include <dm.h>
   9 #include <ram.h>
  10 #include <spl.h>
  11 #include <asm/arch-rockchip/bootrom.h>
  12 #include <asm/arch-rockchip/sdram.h>
  13 #include <asm/io.h>
  14
  15 DECLARE_GLOBAL_DATA_PTR;
  16
  17 void board_return_to_bootrom(void)
  18 {
  19         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  20 }
  21
  22 __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
  23 };
  24
  25 const char *board_spl_was_booted_from(void)
  26 {
  27         u32  bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
  28         const char *bootdevice_ofpath = NULL;
  29
  30         if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
  31                 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
  32
  33         if (bootdevice_ofpath)
  34                 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
  35                       __func__, bootdevice_brom_id, bootdevice_ofpath);
  36         else
  37                 debug("%s: failed to resolve brom_bootdevice_id %x\n",
  38                       __func__, bootdevice_brom_id);
  39
  40         return bootdevice_ofpath;
  41 }
  42
  43 u32 spl_boot_device(void)
  44 {
  45         u32 boot_device = BOOT_DEVICE_MMC1;
  46
  47 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
  48                 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
  49                 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
  50         return BOOT_DEVICE_SPI;
  51 #endif
  52         if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
  53                 return BOOT_DEVICE_BOOTROM;
  54
  55         return boot_device;
  56 }
  57
  58 u32 spl_boot_mode(const u32 boot_device)
  59 {
  60         return MMCSD_MODE_RAW;
  61 }
  62
  63 #if !defined(CONFIG_ROCKCHIP_RK3188)
  64 #define TIMER_LOAD_COUNT_L      0x00
  65 #define TIMER_LOAD_COUNT_H      0x04
  66 #define TIMER_CONTROL_REG       0x10
  67 #define TIMER_EN        0x1
  68 #define TIMER_FMODE     BIT(0)
  69 #define TIMER_RMODE     BIT(1)
  70
  71 __weak void rockchip_stimer_init(void)
  72 {
  73         /* If Timer already enabled, don't re-init it */
  74         u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  75
  76         if (reg & TIMER_EN)
  77                 return;
  78 #ifndef CONFIG_ARM64
  79         asm volatile("mcr p15, 0, %0, c14, c0, 0"
  80                      : : "r"(COUNTER_FREQUENCY));
  81 #endif
  82         writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  83         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
  84         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
  85         writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
  86                TIMER_CONTROL_REG);
  87 }
  88 #endif
  89
  90 __weak int board_early_init_f(void)
  91 {
  92         return 0;
  93 }
  94
  95 __weak int arch_cpu_init(void)
  96 {
  97         return 0;
  98 }
  99
 100 void board_init_f(ulong dummy)
 101 {
 102         int ret;
 103 #if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT)
 104         struct udevice *dev;
 105 #endif
 106
 107 #ifdef CONFIG_DEBUG_UART
 108         /*
 109          * Debug UART can be used from here if required:
 110          *
 111          * debug_uart_init();
 112          * printch('a');
 113          * printhex8(0x1234);
 114          * printascii("string");
 115          */
 116         debug_uart_init();
 117         debug("\nspl:debug uart enabled in %s\n", __func__);
 118 #endif
 119
 120         board_early_init_f();
 121
 122         ret = spl_early_init();
 123         if (ret) {
 124                 printf("spl_early_init() failed: %d\n", ret);
 125                 hang();
 126         }
 127         arch_cpu_init();
 128 #if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT)
 129         debug("\nspl:init dram\n");
 130         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 131         if (ret) {
 132                 printf("DRAM init failed: %d\n", ret);
 133                 return;
 134         }
 135 #endif
 136 #if !defined(CONFIG_ROCKCHIP_RK3188)
 137         rockchip_stimer_init();
 138 #endif
 139 #ifdef CONFIG_SYS_ARCH_TIMER
 140         /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
 141         timer_init();
 142 #endif
 143         preloader_console_init();
 144 }
 145
 146 #ifdef CONFIG_SPL_LOAD_FIT
 147 int board_fit_config_name_match(const char *name)
 148 {
 149         /* Just empty function now - can't decide what to choose */
 150         debug("%s: %s\n", __func__, name);
 151
 152         return 0;
 153 }
 154 #endif