arch/arm/mach-rockchip/spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include <common.h>
   7 #include <debug_uart.h>
   8 #include <dm.h>
   9 #include <hang.h>
  10 #include <image.h>
  11 #include <ram.h>
  12 #include <spl.h>
  13 #include <asm/arch-rockchip/bootrom.h>
  14 #include <asm/io.h>
  15
  16 DECLARE_GLOBAL_DATA_PTR;
  17
  18 int board_return_to_bootrom(struct spl_image_info *spl_image,
  19                             struct spl_boot_device *bootdev)
  20 {
  21         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  22
  23         return 0;
  24 }
  25
  26 __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
  27 };
  28
  29 const char *board_spl_was_booted_from(void)
  30 {
  31         u32  bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
  32         const char *bootdevice_ofpath = NULL;
  33
  34         if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
  35                 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
  36
  37         if (bootdevice_ofpath)
  38                 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
  39                       __func__, bootdevice_brom_id, bootdevice_ofpath);
  40         else
  41                 debug("%s: failed to resolve brom_bootdevice_id %x\n",
  42                       __func__, bootdevice_brom_id);
  43
  44         return bootdevice_ofpath;
  45 }
  46
  47 u32 spl_boot_device(void)
  48 {
  49         u32 boot_device = BOOT_DEVICE_MMC1;
  50
  51 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
  52                 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
  53                 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
  54         return BOOT_DEVICE_SPI;
  55 #endif
  56         if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
  57                 return BOOT_DEVICE_BOOTROM;
  58
  59         return boot_device;
  60 }
  61
  62 u32 spl_mmc_boot_mode(const u32 boot_device)
  63 {
  64         return MMCSD_MODE_RAW;
  65 }
  66
  67 #if !defined(CONFIG_ROCKCHIP_RK3188)
  68 #define TIMER_LOAD_COUNT_L      0x00
  69 #define TIMER_LOAD_COUNT_H      0x04
  70 #define TIMER_CONTROL_REG       0x10
  71 #define TIMER_EN        0x1
  72 #define TIMER_FMODE     BIT(0)
  73 #define TIMER_RMODE     BIT(1)
  74
  75 __weak void rockchip_stimer_init(void)
  76 {
  77         /* If Timer already enabled, don't re-init it */
  78         u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  79
  80         if (reg & TIMER_EN)
  81                 return;
  82 #ifndef CONFIG_ARM64
  83         asm volatile("mcr p15, 0, %0, c14, c0, 0"
  84                      : : "r"(COUNTER_FREQUENCY));
  85 #endif
  86         writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  87         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
  88         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
  89         writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
  90                TIMER_CONTROL_REG);
  91 }
  92 #endif
  93
  94 __weak int board_early_init_f(void)
  95 {
  96         return 0;
  97 }
  98
  99 __weak int arch_cpu_init(void)
 100 {
 101         return 0;
 102 }
 103
 104 void board_init_f(ulong dummy)
 105 {
 106         int ret;
 107 #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
 108         struct udevice *dev;
 109 #endif
 110
 111 #ifdef CONFIG_DEBUG_UART
 112         /*
 113          * Debug UART can be used from here if required:
 114          *
 115          * debug_uart_init();
 116          * printch('a');
 117          * printhex8(0x1234);
 118          * printascii("string");
 119          */
 120         debug_uart_init();
 121         debug("\nspl:debug uart enabled in %s\n", __func__);
 122 #endif
 123
 124         board_early_init_f();
 125
 126         ret = spl_early_init();
 127         if (ret) {
 128                 printf("spl_early_init() failed: %d\n", ret);
 129                 hang();
 130         }
 131         arch_cpu_init();
 132 #if !defined(CONFIG_ROCKCHIP_RK3188)
 133         rockchip_stimer_init();
 134 #endif
 135 #ifdef CONFIG_SYS_ARCH_TIMER
 136         /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
 137         timer_init();
 138 #endif
 139 #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
 140         debug("\nspl:init dram\n");
 141         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 142         if (ret) {
 143                 printf("DRAM init failed: %d\n", ret);
 144                 return;
 145         }
 146 #endif
 147         preloader_console_init();
 148 }
 149
 150 #ifdef CONFIG_SPL_LOAD_FIT
 151 int __weak board_fit_config_name_match(const char *name)
 152 {
 153         /* Just empty function now - can't decide what to choose */
 154         debug("%s: %s\n", __func__, name);
 155
 156         return 0;
 157 }
 158 #endif