arch/arm/mach-rockchip/spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include <common.h>
   7 #include <debug_uart.h>
   8 #include <dm.h>
   9 #include <hang.h>
  10 #include <image.h>
  11 #include <init.h>
  12 #include <log.h>
  13 #include <ram.h>
  14 #include <spl.h>
  15 #include <asm/arch-rockchip/bootrom.h>
  16 #include <asm/io.h>
  17 #include <linux/bitops.h>
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 int board_return_to_bootrom(struct spl_image_info *spl_image,
  22                             struct spl_boot_device *bootdev)
  23 {
  24         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  25
  26         return 0;
  27 }
  28
  29 __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
  30 };
  31
  32 const char *board_spl_was_booted_from(void)
  33 {
  34         u32  bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
  35         const char *bootdevice_ofpath = NULL;
  36
  37         if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
  38                 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
  39
  40         if (bootdevice_ofpath)
  41                 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
  42                       __func__, bootdevice_brom_id, bootdevice_ofpath);
  43         else
  44                 debug("%s: failed to resolve brom_bootdevice_id %x\n",
  45                       __func__, bootdevice_brom_id);
  46
  47         return bootdevice_ofpath;
  48 }
  49
  50 u32 spl_boot_device(void)
  51 {
  52         u32 boot_device = BOOT_DEVICE_MMC1;
  53
  54 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
  55                 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
  56                 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
  57                 defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
  58         return BOOT_DEVICE_SPI;
  59 #endif
  60         if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
  61                 return BOOT_DEVICE_BOOTROM;
  62
  63         return boot_device;
  64 }
  65
  66 u32 spl_mmc_boot_mode(const u32 boot_device)
  67 {
  68         return MMCSD_MODE_RAW;
  69 }
  70
  71 #if !defined(CONFIG_ROCKCHIP_RK3188)
  72 #define TIMER_LOAD_COUNT_L      0x00
  73 #define TIMER_LOAD_COUNT_H      0x04
  74 #define TIMER_CONTROL_REG       0x10
  75 #define TIMER_EN        0x1
  76 #define TIMER_FMODE     BIT(0)
  77 #define TIMER_RMODE     BIT(1)
  78
  79 __weak void rockchip_stimer_init(void)
  80 {
  81         /* If Timer already enabled, don't re-init it */
  82         u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  83
  84         if (reg & TIMER_EN)
  85                 return;
  86 #ifndef CONFIG_ARM64
  87         asm volatile("mcr p15, 0, %0, c14, c0, 0"
  88                      : : "r"(COUNTER_FREQUENCY));
  89 #endif
  90         writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  91         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
  92         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
  93         writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
  94                TIMER_CONTROL_REG);
  95 }
  96 #endif
  97
  98 __weak int board_early_init_f(void)
  99 {
 100         return 0;
 101 }
 102
 103 __weak int arch_cpu_init(void)
 104 {
 105         return 0;
 106 }
 107
 108 void board_init_f(ulong dummy)
 109 {
 110         int ret;
 111
 112 #ifdef CONFIG_DEBUG_UART
 113         /*
 114          * Debug UART can be used from here if required:
 115          *
 116          * debug_uart_init();
 117          * printch('a');
 118          * printhex8(0x1234);
 119          * printascii("string");
 120          */
 121         debug_uart_init();
 122         debug("\nspl:debug uart enabled in %s\n", __func__);
 123 #endif
 124
 125         board_early_init_f();
 126
 127         ret = spl_early_init();
 128         if (ret) {
 129                 printf("spl_early_init() failed: %d\n", ret);
 130                 hang();
 131         }
 132         arch_cpu_init();
 133 #if !defined(CONFIG_ROCKCHIP_RK3188)
 134         rockchip_stimer_init();
 135 #endif
 136 #ifdef CONFIG_SYS_ARCH_TIMER
 137         /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
 138         timer_init();
 139 #endif
 140 #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_RAM)
 141         debug("\nspl:init dram\n");
 142         ret = dram_init();
 143         if (ret) {
 144                 printf("DRAM init failed: %d\n", ret);
 145                 return;
 146         }
 147         gd->ram_top = gd->ram_base + get_effective_memsize();
 148         gd->ram_top = board_get_usable_ram_top(gd->ram_size);
 149 #endif
 150         preloader_console_init();
 151 }
 152
 153 #ifdef CONFIG_SPL_LOAD_FIT
 154 int __weak board_fit_config_name_match(const char *name)
 155 {
 156         /* Just empty function now - can't decide what to choose */
 157         debug("%s: %s\n", __func__, name);
 158
 159         return 0;
 160 }
 161 #endif