1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2015 Google, Inc
8 #include <debug_uart.h>
18 #include <asm/arch/bootrom.h>
19 #include <asm/arch/clock.h>
20 #include <asm/arch/grf_rk3188.h>
21 #include <asm/arch/hardware.h>
22 #include <asm/arch/periph.h>
23 #include <asm/arch/pmu_rk3188.h>
24 #include <asm/arch/sdram.h>
25 #include <asm/arch/timer.h>
26 #include <dm/pinctrl.h>
30 #include <power/regulator.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 u32 spl_boot_device(void)
36 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
37 const void *blob = gd->fdt_blob;
43 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
44 debug("Boot device %s\n", bootdev);
48 node = fdt_path_offset(blob, bootdev);
50 debug("node=%d\n", node);
53 ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev);
55 debug("device at node %s/%d not found: %d\n", bootdev, node,
59 debug("Found device %s\n", dev->name);
60 switch (device_get_uclass_id(dev)) {
61 case UCLASS_SPI_FLASH:
62 return BOOT_DEVICE_SPI;
64 return BOOT_DEVICE_MMC1;
66 debug("Booting from device uclass '%s' not supported\n",
67 dev_get_uclass_name(dev));
72 return BOOT_DEVICE_MMC1;
75 static int setup_arm_clock(void)
81 ret = rockchip_get_clk(&dev);
86 ret = clk_request(dev, &clk);
90 ret = clk_set_rate(&clk, 600000000);
96 void board_debug_uart_init(void)
98 /* Enable early UART on the RK3188 */
99 #define GRF_BASE 0x20008000
100 struct rk3188_grf * const grf = (void *)GRF_BASE;
113 /* Enable early UART on the RK3188 */
114 rk_clrsetreg(&grf->gpio1b_iomux,
115 GPIO1B1_MASK << GPIO1B1_SHIFT |
116 GPIO1B0_MASK << GPIO1B0_SHIFT,
117 GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
118 GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
121 void board_init_f(ulong dummy)
129 * Debug UART can be used from here if required:
134 * printascii("string");
137 printascii("U-Boot SPL board init");
140 #ifdef CONFIG_ROCKCHIP_USB_UART
141 rk_clrsetreg(&grf->uoc0_con[0],
142 SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
143 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
144 1 << COMMON_ON_N_SHIFT);
145 rk_clrsetreg(&grf->uoc0_con[2],
146 SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
147 rk_clrsetreg(&grf->uoc0_con[3],
148 OPMODE_MASK | XCVRSELECT_MASK |
149 TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
150 OPMODE_NODRIVING << OPMODE_SHIFT |
151 XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
152 1 << TERMSEL_FULLSPEED_SHIFT |
153 1 << SUSPENDN_SHIFT);
154 rk_clrsetreg(&grf->uoc0_con[0],
155 BYPASSSEL_MASK | BYPASSDMEN_MASK,
156 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
159 ret = spl_early_init();
161 debug("spl_early_init() failed: %d\n", ret);
165 ret = rockchip_get_clk(&dev);
167 debug("CLK init failed: %d\n", ret);
171 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
173 debug("DRAM init failed: %d\n", ret);
178 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
179 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
183 static int setup_led(void)
185 #ifdef CONFIG_SPL_LED
190 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
193 ret = led_get_by_label(led_name, &dev);
195 debug("%s: get=%d\n", __func__, ret);
198 ret = led_set_on(dev, 1);
206 void spl_board_init(void)
212 debug("LED ret=%d\n", ret);
216 preloader_console_init();
217 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
218 back_to_bootrom(BROM_BOOT_NEXTSTAGE);