arch/arm/mach-mediatek/mt8518/init.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Configuration for MediaTek MT8518 SoC
   4  *
   5  * Copyright (C) 2019 MediaTek Inc.
   6  * Author: Mingming Lee <mingming.lee@mediatek.com>
   7  */
   8
   9 #include <clk.h>
  10 #include <common.h>
  11 #include <cpu_func.h>
  12 #include <dm.h>
  13 #include <fdtdec.h>
  14 #include <init.h>
  15 #include <ram.h>
  16 #include <asm/arch/misc.h>
  17 #include <asm/armv8/mmu.h>
  18 #include <asm/cache.h>
  19 #include <asm/sections.h>
  20 #include <dm/uclass.h>
  21 #include <dt-bindings/clock/mt8518-clk.h>
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 int dram_init(void)
  26 {
  27         int ret;
  28
  29         ret = fdtdec_setup_memory_banksize();
  30         if (ret)
  31                 return ret;
  32
  33         return fdtdec_setup_mem_size_base();
  34 }
  35
  36 int dram_init_banksize(void)
  37 {
  38         gd->bd->bi_dram[0].start = gd->ram_base;
  39         gd->bd->bi_dram[0].size = gd->ram_size;
  40
  41         return 0;
  42 }
  43
  44 void reset_cpu(ulong addr)
  45 {
  46         psci_system_reset();
  47 }
  48
  49 int print_cpuinfo(void)
  50 {
  51         printf("CPU:   MediaTek MT8518\n");
  52         return 0;
  53 }
  54
  55 static struct mm_region mt8518_mem_map[] = {
  56         {
  57                 /* DDR */
  58                 .virt = 0x40000000UL,
  59                 .phys = 0x40000000UL,
  60                 .size = 0x20000000UL,
  61                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
  62         }, {
  63                 .virt = 0x00000000UL,
  64                 .phys = 0x00000000UL,
  65                 .size = 0x20000000UL,
  66                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  67                          PTE_BLOCK_NON_SHARE |
  68                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  69         }, {
  70                 0,
  71         }
  72 };
  73
  74 struct mm_region *mem_map = mt8518_mem_map;