Merge tag 'ti-v2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
[oweals/u-boot.git] / arch / arm / mach-k3 / common.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * K3: Common Architecture initialization
4  *
5  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
6  *      Lokesh Vutla <lokeshvutla@ti.com>
7  */
8
9 #include <common.h>
10 #include <cpu_func.h>
11 #include <spl.h>
12 #include "common.h"
13 #include <dm.h>
14 #include <remoteproc.h>
15 #include <linux/soc/ti/ti_sci_protocol.h>
16 #include <fdt_support.h>
17 #include <asm/arch/sys_proto.h>
18 #include <asm/hardware.h>
19 #include <asm/io.h>
20 #include <fs_loader.h>
21 #include <fs.h>
22 #include <env.h>
23 #include <elf.h>
24
25 struct ti_sci_handle *get_ti_sci_handle(void)
26 {
27         struct udevice *dev;
28         int ret;
29
30         ret = uclass_get_device_by_driver(UCLASS_FIRMWARE,
31                                           DM_GET_DRIVER(ti_sci), &dev);
32         if (ret)
33                 panic("Failed to get SYSFW (%d)\n", ret);
34
35         return (struct ti_sci_handle *)ti_sci_get_handle_from_sysfw(dev);
36 }
37
38 void k3_sysfw_print_ver(void)
39 {
40         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
41         char fw_desc[sizeof(ti_sci->version.firmware_description) + 1];
42
43         /*
44          * Output System Firmware version info. Note that since the
45          * 'firmware_description' field is not guaranteed to be zero-
46          * terminated we manually add a \0 terminator if needed. Further
47          * note that we intentionally no longer rely on the extended
48          * printf() formatter '%.*s' to not having to require a more
49          * full-featured printf() implementation.
50          */
51         strncpy(fw_desc, ti_sci->version.firmware_description,
52                 sizeof(ti_sci->version.firmware_description));
53         fw_desc[sizeof(fw_desc) - 1] = '\0';
54
55         printf("SYSFW ABI: %d.%d (firmware rev 0x%04x '%s')\n",
56                ti_sci->version.abi_major, ti_sci->version.abi_minor,
57                ti_sci->version.firmware_revision, fw_desc);
58 }
59
60 DECLARE_GLOBAL_DATA_PTR;
61
62 #ifdef CONFIG_K3_EARLY_CONS
63 int early_console_init(void)
64 {
65         struct udevice *dev;
66         int ret;
67
68         gd->baudrate = CONFIG_BAUDRATE;
69
70         ret = uclass_get_device_by_seq(UCLASS_SERIAL, CONFIG_K3_EARLY_CONS_IDX,
71                                        &dev);
72         if (ret) {
73                 printf("Error getting serial dev for early console! (%d)\n",
74                        ret);
75                 return ret;
76         }
77
78         gd->cur_serial_dev = dev;
79         gd->flags |= GD_FLG_SERIAL_READY;
80         gd->have_console = 1;
81
82         return 0;
83 }
84 #endif
85
86 #ifdef CONFIG_SYS_K3_SPL_ATF
87
88 void init_env(void)
89 {
90 #ifdef CONFIG_SPL_ENV_SUPPORT
91         char *part;
92
93         env_init();
94         env_relocate();
95         switch (spl_boot_device()) {
96         case BOOT_DEVICE_MMC2:
97                 part = env_get("bootpart");
98                 env_set("storage_interface", "mmc");
99                 env_set("fw_dev_part", part);
100                 break;
101         case BOOT_DEVICE_SPI:
102                 env_set("storage_interface", "ubi");
103                 env_set("fw_ubi_mtdpart", "UBI");
104                 env_set("fw_ubi_volume", "UBI0");
105                 break;
106         default:
107                 printf("%s from device %u not supported!\n",
108                        __func__, spl_boot_device());
109                 return;
110         }
111 #endif
112 }
113
114 #ifdef CONFIG_FS_LOADER
115 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
116 {
117         struct udevice *fsdev;
118         char *name = NULL;
119         int size = 0;
120
121         *loadaddr = 0;
122 #ifdef CONFIG_SPL_ENV_SUPPORT
123         switch (spl_boot_device()) {
124         case BOOT_DEVICE_MMC2:
125                 name = env_get(name_fw);
126                 *loadaddr = env_get_hex(name_loadaddr, *loadaddr);
127                 break;
128         default:
129                 printf("Loading rproc fw image from device %u not supported!\n",
130                        spl_boot_device());
131                 return 0;
132         }
133 #endif
134         if (!*loadaddr)
135                 return 0;
136
137         if (!uclass_get_device(UCLASS_FS_FIRMWARE_LOADER, 0, &fsdev)) {
138                 size = request_firmware_into_buf(fsdev, name, (void *)*loadaddr,
139                                                  0, 0);
140         }
141
142         return size;
143 }
144 #else
145 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
146 {
147         return 0;
148 }
149 #endif
150
151 __weak void start_non_linux_remote_cores(void)
152 {
153 }
154
155 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
156 {
157         typedef void __noreturn (*image_entry_noargs_t)(void);
158         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
159         u32 loadaddr = 0;
160         int ret, size;
161
162         /* Release all the exclusive devices held by SPL before starting ATF */
163         ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
164
165         ret = rproc_init();
166         if (ret)
167                 panic("rproc failed to be initialized (%d)\n", ret);
168
169         init_env();
170         start_non_linux_remote_cores();
171         size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load",
172                              &loadaddr);
173
174
175         /*
176          * It is assumed that remoteproc device 1 is the corresponding
177          * Cortex-A core which runs ATF. Make sure DT reflects the same.
178          */
179         ret = rproc_load(1, spl_image->entry_point, 0x200);
180         if (ret)
181                 panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
182
183         /* Add an extra newline to differentiate the ATF logs from SPL */
184         printf("Starting ATF on ARM64 core...\n\n");
185
186         ret = rproc_start(1);
187         if (ret)
188                 panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
189         if (!(size > 0 && valid_elf_image(loadaddr))) {
190                 debug("Shutting down...\n");
191                 release_resources_for_core_shutdown();
192
193                 while (1)
194                         asm volatile("wfe");
195         }
196
197         image_entry_noargs_t image_entry =
198                 (image_entry_noargs_t)load_elf_image_phdr(loadaddr);
199
200         image_entry();
201 }
202 #endif
203
204 #if defined(CONFIG_OF_LIBFDT)
205 int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
206 {
207         u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
208         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
209         int ret, node, subnode, len, prev_node;
210         u32 range[4], addr, size;
211         const fdt32_t *sub_reg;
212
213         ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
214         msmc_size = msmc_end - msmc_start + 1;
215         debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
216               msmc_start, msmc_size);
217
218         /* find or create "msmc_sram node */
219         ret = fdt_path_offset(blob, parent_path);
220         if (ret < 0)
221                 return ret;
222
223         node = fdt_find_or_add_subnode(blob, ret, node_name);
224         if (node < 0)
225                 return node;
226
227         ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
228         if (ret < 0)
229                 return ret;
230
231         reg[0] = cpu_to_fdt64(msmc_start);
232         reg[1] = cpu_to_fdt64(msmc_size);
233         ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
234         if (ret < 0)
235                 return ret;
236
237         fdt_setprop_cell(blob, node, "#address-cells", 1);
238         fdt_setprop_cell(blob, node, "#size-cells", 1);
239
240         range[0] = 0;
241         range[1] = cpu_to_fdt32(msmc_start >> 32);
242         range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
243         range[3] = cpu_to_fdt32(msmc_size);
244         ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
245         if (ret < 0)
246                 return ret;
247
248         subnode = fdt_first_subnode(blob, node);
249         prev_node = 0;
250
251         /* Look for invalid subnodes and delete them */
252         while (subnode >= 0) {
253                 sub_reg = fdt_getprop(blob, subnode, "reg", &len);
254                 addr = fdt_read_number(sub_reg, 1);
255                 sub_reg++;
256                 size = fdt_read_number(sub_reg, 1);
257                 debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
258                       subnode, addr, size);
259                 if (addr + size > msmc_size ||
260                     !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
261                     !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
262                         fdt_del_node(blob, subnode);
263                         debug("%s: deleting subnode %d\n", __func__, subnode);
264                         if (!prev_node)
265                                 subnode = fdt_first_subnode(blob, node);
266                         else
267                                 subnode = fdt_next_subnode(blob, prev_node);
268                 } else {
269                         prev_node = subnode;
270                         subnode = fdt_next_subnode(blob, prev_node);
271                 }
272         }
273
274         return 0;
275 }
276
277 int fdt_disable_node(void *blob, char *node_path)
278 {
279         int offs;
280         int ret;
281
282         offs = fdt_path_offset(blob, node_path);
283         if (offs < 0) {
284                 printf("Node %s not found.\n", node_path);
285                 return offs;
286         }
287         ret = fdt_setprop_string(blob, offs, "status", "disabled");
288         if (ret < 0) {
289                 printf("Could not add status property to node %s: %s\n",
290                        node_path, fdt_strerror(ret));
291                 return ret;
292         }
293         return 0;
294 }
295
296 #endif
297
298 #ifndef CONFIG_SYSRESET
299 void reset_cpu(ulong ignored)
300 {
301 }
302 #endif
303
304 #if defined(CONFIG_DISPLAY_CPUINFO)
305 int print_cpuinfo(void)
306 {
307         u32 soc, rev;
308         char *name;
309
310         soc = (readl(CTRLMMR_WKUP_JTAG_ID) &
311                 JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
312         rev = (readl(CTRLMMR_WKUP_JTAG_ID) &
313                 JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT;
314
315         printf("SoC:   ");
316         switch (soc) {
317         case AM65X:
318                 name = "AM65x";
319                 break;
320         case J721E:
321                 name = "J721E";
322                 break;
323         default:
324                 name = "Unknown Silicon";
325         };
326
327         printf("%s SR ", name);
328         switch (rev) {
329         case REV_PG1_0:
330                 name = "1.0";
331                 break;
332         case REV_PG2_0:
333                 name = "2.0";
334                 break;
335         default:
336                 name = "Unknown Revision";
337         };
338         printf("%s\n", name);
339
340         return 0;
341 }
342 #endif
343
344 #ifdef CONFIG_ARM64
345 void board_prep_linux(bootm_headers_t *images)
346 {
347         debug("Linux kernel Image start = 0x%lx end = 0x%lx\n",
348               images->os.start, images->os.end);
349         __asm_flush_dcache_range(images->os.start,
350                                  ROUND(images->os.end,
351                                        CONFIG_SYS_CACHELINE_SIZE));
352 }
353 #endif
354
355 #ifdef CONFIG_CPU_V7R
356 void disable_linefill_optimization(void)
357 {
358         u32 actlr;
359
360         /*
361          * On K3 devices there are 2 conditions where R5F can deadlock:
362          * 1.When software is performing series of store operations to
363          *   cacheable write back/write allocate memory region and later
364          *   on software execute barrier operation (DSB or DMB). R5F may
365          *   hang at the barrier instruction.
366          * 2.When software is performing a mix of load and store operations
367          *   within a tight loop and store operations are all writing to
368          *   cacheable write back/write allocates memory regions, R5F may
369          *   hang at one of the load instruction.
370          *
371          * To avoid the above two conditions disable linefill optimization
372          * inside Cortex R5F.
373          */
374         asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
375         actlr |= (1 << 13); /* Set DLFO bit  */
376         asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
377 }
378 #endif
379
380 void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size)
381 {
382         struct ti_sci_msg_fwl_region region;
383         struct ti_sci_fwl_ops *fwl_ops;
384         struct ti_sci_handle *ti_sci;
385         size_t i, j;
386
387         ti_sci = get_ti_sci_handle();
388         fwl_ops = &ti_sci->ops.fwl_ops;
389         for (i = 0; i < fwl_data_size; i++) {
390                 for (j = 0; j <  fwl_data[i].regions; j++) {
391                         region.fwl_id = fwl_data[i].fwl_id;
392                         region.region = j;
393                         region.n_permission_regs = 3;
394
395                         fwl_ops->get_fwl_region(ti_sci, &region);
396
397                         if (region.control != 0) {
398                                 pr_debug("Attempting to disable firewall %5d (%25s)\n",
399                                          region.fwl_id, fwl_data[i].name);
400                                 region.control = 0;
401
402                                 if (fwl_ops->set_fwl_region(ti_sci, &region))
403                                         pr_err("Could not disable firewall %5d (%25s)\n",
404                                                region.fwl_id, fwl_data[i].name);
405                         }
406                 }
407         }
408 }