1 // SPDX-License-Identifier: GPL-2.0+
3 * K3: Architecture initialization
5 * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
6 * Lokesh Vutla <lokeshvutla@ti.com>
12 #include <asm/arch/hardware.h>
14 #ifdef CONFIG_SPL_BUILD
15 static void mmr_unlock(u32 base, u32 partition)
17 /* Translate the base address */
18 phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
20 /* Unlock the requested partition if locked using two-step sequence */
21 writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0);
22 writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1);
25 static void ctrl_mmr_unlock(void)
27 /* Unlock all WKUP_CTRL_MMR0 module registers */
28 mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
29 mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
30 mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
31 mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
32 mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
33 mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
35 /* Unlock all MCU_CTRL_MMR0 module registers */
36 mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
37 mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
38 mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
39 mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
41 /* Unlock all CTRL_MMR0 module registers */
42 mmr_unlock(CTRL_MMR0_BASE, 0);
43 mmr_unlock(CTRL_MMR0_BASE, 1);
44 mmr_unlock(CTRL_MMR0_BASE, 2);
45 mmr_unlock(CTRL_MMR0_BASE, 3);
46 mmr_unlock(CTRL_MMR0_BASE, 6);
47 mmr_unlock(CTRL_MMR0_BASE, 7);
50 static void store_boot_index_from_rom(void)
52 u32 *boot_index = (u32 *)K3_BOOT_PARAM_TABLE_INDEX_VAL;
54 *boot_index = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
57 void board_init_f(ulong dummy)
60 * Cannot delay this further as there is a chance that
61 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
63 store_boot_index_from_rom();
65 /* Make all control module registers accessible */
68 /* Init DM early in-order to invoke system controller */
71 /* Prepare console output */
72 preloader_console_init();
75 u32 spl_boot_mode(const u32 boot_device)
77 #if defined(CONFIG_SUPPORT_EMMC_BOOT)
78 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
79 u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL);
81 u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >>
82 CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT;
84 /* eMMC boot0 mode is only supported for primary boot */
85 if (bootindex == K3_PRIMARY_BOOTMODE &&
86 bootmode == BOOT_DEVICE_MMC1)
87 return MMCSD_MODE_EMMCBOOT;
90 /* Everything else use filesystem if available */
91 #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
94 return MMCSD_MODE_RAW;
98 static u32 __get_backup_bootmedia(u32 devstat)
100 u32 bkup_boot = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >>
101 CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT;
104 case BACKUP_BOOT_DEVICE_USB:
105 return BOOT_DEVICE_USB;
106 case BACKUP_BOOT_DEVICE_UART:
107 return BOOT_DEVICE_UART;
108 case BACKUP_BOOT_DEVICE_ETHERNET:
109 return BOOT_DEVICE_ETHERNET;
110 case BACKUP_BOOT_DEVICE_MMC2:
112 u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) >>
113 CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT;
115 return BOOT_DEVICE_MMC1;
116 return BOOT_DEVICE_MMC2;
118 case BACKUP_BOOT_DEVICE_SPI:
119 return BOOT_DEVICE_SPI;
120 case BACKUP_BOOT_DEVICE_HYPERFLASH:
121 return BOOT_DEVICE_HYPERFLASH;
122 case BACKUP_BOOT_DEVICE_I2C:
123 return BOOT_DEVICE_I2C;
126 return BOOT_DEVICE_RAM;
129 static u32 __get_primary_bootmedia(u32 devstat)
131 u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >>
132 CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT;
134 if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI)
135 bootmode = BOOT_DEVICE_SPI;
137 if (bootmode == BOOT_DEVICE_MMC2) {
138 u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK) >>
139 CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT;
141 bootmode = BOOT_DEVICE_MMC1;
142 } else if (bootmode == BOOT_DEVICE_MMC1) {
143 u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK) >>
144 CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT;
146 bootmode = BOOT_DEVICE_MMC2;
152 u32 spl_boot_device(void)
154 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
155 u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL);
157 if (bootindex == K3_PRIMARY_BOOTMODE)
158 return __get_primary_bootmedia(devstat);
160 return __get_backup_bootmedia(devstat);
164 #ifndef CONFIG_SYSRESET
165 void reset_cpu(ulong ignored)