1 // SPDX-License-Identifier: GPL-2.0+
3 * K3: Architecture initialization
5 * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
6 * Lokesh Vutla <lokeshvutla@ti.com>
12 #include <asm/arch/hardware.h>
15 #ifdef CONFIG_SPL_BUILD
16 static void mmr_unlock(u32 base, u32 partition)
18 /* Translate the base address */
19 phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
21 /* Unlock the requested partition if locked using two-step sequence */
22 writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0);
23 writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1);
26 static void ctrl_mmr_unlock(void)
28 /* Unlock all WKUP_CTRL_MMR0 module registers */
29 mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
30 mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
31 mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
32 mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
33 mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
34 mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
36 /* Unlock all MCU_CTRL_MMR0 module registers */
37 mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
38 mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
39 mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
40 mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
42 /* Unlock all CTRL_MMR0 module registers */
43 mmr_unlock(CTRL_MMR0_BASE, 0);
44 mmr_unlock(CTRL_MMR0_BASE, 1);
45 mmr_unlock(CTRL_MMR0_BASE, 2);
46 mmr_unlock(CTRL_MMR0_BASE, 3);
47 mmr_unlock(CTRL_MMR0_BASE, 6);
48 mmr_unlock(CTRL_MMR0_BASE, 7);
51 static void store_boot_index_from_rom(void)
53 u32 *boot_index = (u32 *)K3_BOOT_PARAM_TABLE_INDEX_VAL;
55 *boot_index = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
58 void board_init_f(ulong dummy)
61 * Cannot delay this further as there is a chance that
62 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
64 store_boot_index_from_rom();
66 /* Make all control module registers accessible */
70 setup_k3_mpu_regions();
73 /* Init DM early in-order to invoke system controller */
76 /* Prepare console output */
77 preloader_console_init();
80 u32 spl_boot_mode(const u32 boot_device)
82 #if defined(CONFIG_SUPPORT_EMMC_BOOT)
83 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
84 u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL);
86 u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >>
87 CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT;
89 /* eMMC boot0 mode is only supported for primary boot */
90 if (bootindex == K3_PRIMARY_BOOTMODE &&
91 bootmode == BOOT_DEVICE_MMC1)
92 return MMCSD_MODE_EMMCBOOT;
95 /* Everything else use filesystem if available */
96 #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
99 return MMCSD_MODE_RAW;
103 static u32 __get_backup_bootmedia(u32 devstat)
105 u32 bkup_boot = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >>
106 CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT;
109 case BACKUP_BOOT_DEVICE_USB:
110 return BOOT_DEVICE_USB;
111 case BACKUP_BOOT_DEVICE_UART:
112 return BOOT_DEVICE_UART;
113 case BACKUP_BOOT_DEVICE_ETHERNET:
114 return BOOT_DEVICE_ETHERNET;
115 case BACKUP_BOOT_DEVICE_MMC2:
117 u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) >>
118 CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT;
120 return BOOT_DEVICE_MMC1;
121 return BOOT_DEVICE_MMC2;
123 case BACKUP_BOOT_DEVICE_SPI:
124 return BOOT_DEVICE_SPI;
125 case BACKUP_BOOT_DEVICE_HYPERFLASH:
126 return BOOT_DEVICE_HYPERFLASH;
127 case BACKUP_BOOT_DEVICE_I2C:
128 return BOOT_DEVICE_I2C;
131 return BOOT_DEVICE_RAM;
134 static u32 __get_primary_bootmedia(u32 devstat)
136 u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >>
137 CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT;
139 if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI)
140 bootmode = BOOT_DEVICE_SPI;
142 if (bootmode == BOOT_DEVICE_MMC2) {
143 u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK) >>
144 CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT;
146 bootmode = BOOT_DEVICE_MMC1;
147 } else if (bootmode == BOOT_DEVICE_MMC1) {
148 u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK) >>
149 CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT;
151 bootmode = BOOT_DEVICE_MMC2;
157 u32 spl_boot_device(void)
159 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
160 u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL);
162 if (bootindex == K3_PRIMARY_BOOTMODE)
163 return __get_primary_bootmedia(devstat);
165 return __get_backup_bootmedia(devstat);
169 #ifndef CONFIG_SYSRESET
170 void reset_cpu(ulong ignored)