arch/arm/include/asm/arch-stm32f4/stm32_pwr.h

   1 /*
   2  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
   3  * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __STM32_PWR_H_
   9
  10 /*
  11  * Offsets of some PWR registers
  12  */
  13 #define PWR_CR1_ODEN                    BIT(16)
  14 #define PWR_CR1_ODSWEN                  BIT(17)
  15 #define PWR_CSR1_ODRDY                  BIT(16)
  16 #define PWR_CSR1_ODSWRDY                BIT(17)
  17
  18 struct stm32_pwr_regs {
  19         u32 cr1;   /* power control register 1 */
  20         u32 csr1;  /* power control/status register 2 */
  21 };
  22
  23 #endif /* __STM32_PWR_H_ */