arch/arm/imx-common/hab.c

   1 /*
   2  * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:    GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <config.h>
   9 #include <fuse.h>
  10 #include <asm/io.h>
  11 #include <asm/system.h>
  12 #include <asm/arch/clock.h>
  13 #include <asm/arch/sys_proto.h>
  14 #include <asm/imx-common/hab.h>
  15
  16 /* -------- start of HAB API updates ------------*/
  17
  18 #define hab_rvt_report_event_p                                  \
  19 (                                                               \
  20         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  21           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  22           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  23         ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
  24         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  25          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  26         ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
  27         ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)        \
  28 )
  29
  30 #define hab_rvt_report_status_p                                 \
  31 (                                                               \
  32         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  33           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  34           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  35         ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  36         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  37          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  38         ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  39         ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)      \
  40 )
  41
  42 #define hab_rvt_authenticate_image_p                            \
  43 (                                                               \
  44         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  45           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  46           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  47         ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  48         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  49          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  50         ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  51         ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)    \
  52 )
  53
  54 #define hab_rvt_entry_p                                         \
  55 (                                                               \
  56         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  57           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  58           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  59         ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
  60         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  61          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  62         ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
  63         ((hab_rvt_entry_t *)HAB_RVT_ENTRY)                      \
  64 )
  65
  66 #define hab_rvt_exit_p                                          \
  67 (                                                               \
  68         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  69           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  70           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  71         ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
  72         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  73          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  74         ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
  75         ((hab_rvt_exit_t *)HAB_RVT_EXIT)                        \
  76 )
  77
  78 #define IVT_SIZE                0x20
  79 #define ALIGN_SIZE              0x1000
  80 #define CSF_PAD_SIZE            0x2000
  81 #define MX6DQ_PU_IROM_MMU_EN_VAR        0x009024a8
  82 #define MX6DLS_PU_IROM_MMU_EN_VAR       0x00901dd0
  83 #define MX6SL_PU_IROM_MMU_EN_VAR        0x00900a18
  84 #define IS_HAB_ENABLED_BIT \
  85         (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2)
  86
  87 /*
  88  * +------------+  0x0 (DDR_UIMAGE_START) -
  89  * |   Header   |                          |
  90  * +------------+  0x40                    |
  91  * |            |                          |
  92  * |            |                          |
  93  * |            |                          |
  94  * |            |                          |
  95  * | Image Data |                          |
  96  * .            |                          |
  97  * .            |                           > Stuff to be authenticated ----+
  98  * .            |                          |                                |
  99  * |            |                          |                                |
 100  * |            |                          |                                |
 101  * +------------+                          |                                |
 102  * |            |                          |                                |
 103  * | Fill Data  |                          |                                |
 104  * |            |                          |                                |
 105  * +------------+ Align to ALIGN_SIZE      |                                |
 106  * |    IVT     |                          |                                |
 107  * +------------+ + IVT_SIZE              -                                 |
 108  * |            |                                                           |
 109  * |  CSF DATA  | <---------------------------------------------------------+
 110  * |            |
 111  * +------------+
 112  * |            |
 113  * | Fill Data  |
 114  * |            |
 115  * +------------+ + CSF_PAD_SIZE
 116  */
 117
 118 #define MAX_RECORD_BYTES     (8*1024) /* 4 kbytes */
 119
 120 struct record {
 121         uint8_t  tag;                                           /* Tag */
 122         uint8_t  len[2];                                        /* Length */
 123         uint8_t  par;                                           /* Version */
 124         uint8_t  contents[MAX_RECORD_BYTES];/* Record Data */
 125         bool     any_rec_flag;
 126 };
 127
 128 char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
 129                                    "RSN = HAB_ENG_FAIL (0x30)\n",
 130                                    "RSN = HAB_INV_ADDRESS (0x22)\n",
 131                                    "RSN = HAB_INV_ASSERTION (0x0C)\n",
 132                                    "RSN = HAB_INV_CALL (0x28)\n",
 133                                    "RSN = HAB_INV_CERTIFICATE (0x21)\n",
 134                                    "RSN = HAB_INV_COMMAND (0x06)\n",
 135                                    "RSN = HAB_INV_CSF (0x11)\n",
 136                                    "RSN = HAB_INV_DCD (0x27)\n",
 137                                    "RSN = HAB_INV_INDEX (0x0F)\n",
 138                                    "RSN = HAB_INV_IVT (0x05)\n",
 139                                    "RSN = HAB_INV_KEY (0x1D)\n",
 140                                    "RSN = HAB_INV_RETURN (0x1E)\n",
 141                                    "RSN = HAB_INV_SIGNATURE (0x18)\n",
 142                                    "RSN = HAB_INV_SIZE (0x17)\n",
 143                                    "RSN = HAB_MEM_FAIL (0x2E)\n",
 144                                    "RSN = HAB_OVR_COUNT (0x2B)\n",
 145                                    "RSN = HAB_OVR_STORAGE (0x2D)\n",
 146                                    "RSN = HAB_UNS_ALGORITHM (0x12)\n",
 147                                    "RSN = HAB_UNS_COMMAND (0x03)\n",
 148                                    "RSN = HAB_UNS_ENGINE (0x0A)\n",
 149                                    "RSN = HAB_UNS_ITEM (0x24)\n",
 150                                    "RSN = HAB_UNS_KEY (0x1B)\n",
 151                                    "RSN = HAB_UNS_PROTOCOL (0x14)\n",
 152                                    "RSN = HAB_UNS_STATE (0x09)\n",
 153                                    "RSN = INVALID\n",
 154                                    NULL};
 155
 156 char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
 157                                    "STS = HAB_FAILURE (0x33)\n",
 158                                    "STS = HAB_WARNING (0x69)\n",
 159                                    "STS = INVALID\n",
 160                                    NULL};
 161
 162 char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
 163                                    "ENG = HAB_ENG_SCC (0x03)\n",
 164                                    "ENG = HAB_ENG_RTIC (0x05)\n",
 165                                    "ENG = HAB_ENG_SAHARA (0x06)\n",
 166                                    "ENG = HAB_ENG_CSU (0x0A)\n",
 167                                    "ENG = HAB_ENG_SRTC (0x0C)\n",
 168                                    "ENG = HAB_ENG_DCP (0x1B)\n",
 169                                    "ENG = HAB_ENG_CAAM (0x1D)\n",
 170                                    "ENG = HAB_ENG_SNVS (0x1E)\n",
 171                                    "ENG = HAB_ENG_OCOTP (0x21)\n",
 172                                    "ENG = HAB_ENG_DTCP (0x22)\n",
 173                                    "ENG = HAB_ENG_ROM (0x36)\n",
 174                                    "ENG = HAB_ENG_HDCP (0x24)\n",
 175                                    "ENG = HAB_ENG_RTL (0x77)\n",
 176                                    "ENG = HAB_ENG_SW (0xFF)\n",
 177                                    "ENG = INVALID\n",
 178                                    NULL};
 179
 180 char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
 181                                    "CTX = HAB_CTX_FAB (0xFF)\n",
 182                                    "CTX = HAB_CTX_ENTRY (0xE1)\n",
 183                                    "CTX = HAB_CTX_TARGET (0x33)\n",
 184                                    "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
 185                                    "CTX = HAB_CTX_DCD (0xDD)\n",
 186                                    "CTX = HAB_CTX_CSF (0xCF)\n",
 187                                    "CTX = HAB_CTX_COMMAND (0xC0)\n",
 188                                    "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
 189                                    "CTX = HAB_CTX_ASSERT (0xA0)\n",
 190                                    "CTX = HAB_CTX_EXIT (0xEE)\n",
 191                                    "CTX = INVALID\n",
 192                                    NULL};
 193
 194 uint8_t hab_statuses[5] = {
 195         HAB_STS_ANY,
 196         HAB_FAILURE,
 197         HAB_WARNING,
 198         HAB_SUCCESS,
 199         -1
 200 };
 201
 202 uint8_t hab_reasons[26] = {
 203         HAB_RSN_ANY,
 204         HAB_ENG_FAIL,
 205         HAB_INV_ADDRESS,
 206         HAB_INV_ASSERTION,
 207         HAB_INV_CALL,
 208         HAB_INV_CERTIFICATE,
 209         HAB_INV_COMMAND,
 210         HAB_INV_CSF,
 211         HAB_INV_DCD,
 212         HAB_INV_INDEX,
 213         HAB_INV_IVT,
 214         HAB_INV_KEY,
 215         HAB_INV_RETURN,
 216         HAB_INV_SIGNATURE,
 217         HAB_INV_SIZE,
 218         HAB_MEM_FAIL,
 219         HAB_OVR_COUNT,
 220         HAB_OVR_STORAGE,
 221         HAB_UNS_ALGORITHM,
 222         HAB_UNS_COMMAND,
 223         HAB_UNS_ENGINE,
 224         HAB_UNS_ITEM,
 225         HAB_UNS_KEY,
 226         HAB_UNS_PROTOCOL,
 227         HAB_UNS_STATE,
 228         -1
 229 };
 230
 231 uint8_t hab_contexts[12] = {
 232         HAB_CTX_ANY,
 233         HAB_CTX_FAB,
 234         HAB_CTX_ENTRY,
 235         HAB_CTX_TARGET,
 236         HAB_CTX_AUTHENTICATE,
 237         HAB_CTX_DCD,
 238         HAB_CTX_CSF,
 239         HAB_CTX_COMMAND,
 240         HAB_CTX_AUT_DAT,
 241         HAB_CTX_ASSERT,
 242         HAB_CTX_EXIT,
 243         -1
 244 };
 245
 246 uint8_t hab_engines[16] = {
 247         HAB_ENG_ANY,
 248         HAB_ENG_SCC,
 249         HAB_ENG_RTIC,
 250         HAB_ENG_SAHARA,
 251         HAB_ENG_CSU,
 252         HAB_ENG_SRTC,
 253         HAB_ENG_DCP,
 254         HAB_ENG_CAAM,
 255         HAB_ENG_SNVS,
 256         HAB_ENG_OCOTP,
 257         HAB_ENG_DTCP,
 258         HAB_ENG_ROM,
 259         HAB_ENG_HDCP,
 260         HAB_ENG_RTL,
 261         HAB_ENG_SW,
 262         -1
 263 };
 264
 265 bool is_hab_enabled(void)
 266 {
 267         struct imx_sec_config_fuse_t *fuse =
 268                 (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
 269         uint32_t reg;
 270         int ret;
 271
 272         ret = fuse_read(fuse->bank, fuse->word, &reg);
 273         if (ret) {
 274                 puts("\nSecure boot fuse read error\n");
 275                 return ret;
 276         }
 277
 278         return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
 279 }
 280
 281 static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
 282 {
 283         uint8_t idx = 0;
 284         uint8_t element = list[idx];
 285         while (element != -1) {
 286                 if (element == tgt)
 287                         return idx;
 288                 element = list[++idx];
 289         }
 290         return -1;
 291 }
 292
 293 void process_event_record(uint8_t *event_data, size_t bytes)
 294 {
 295         struct record *rec = (struct record *)event_data;
 296
 297         printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
 298         printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
 299         printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
 300         printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
 301 }
 302
 303 void display_event(uint8_t *event_data, size_t bytes)
 304 {
 305         uint32_t i;
 306
 307         if (!(event_data && bytes > 0))
 308                 return;
 309
 310         for (i = 0; i < bytes; i++) {
 311                 if (i == 0)
 312                         printf("\t0x%02x", event_data[i]);
 313                 else if ((i % 8) == 0)
 314                         printf("\n\t0x%02x", event_data[i]);
 315                 else
 316                         printf(" 0x%02x", event_data[i]);
 317         }
 318
 319         process_event_record(event_data, bytes);
 320 }
 321
 322 int get_hab_status(void)
 323 {
 324         uint32_t index = 0; /* Loop index */
 325         uint8_t event_data[128]; /* Event data buffer */
 326         size_t bytes = sizeof(event_data); /* Event size in bytes */
 327         enum hab_config config = 0;
 328         enum hab_state state = 0;
 329         hab_rvt_report_event_t *hab_rvt_report_event;
 330         hab_rvt_report_status_t *hab_rvt_report_status;
 331
 332         hab_rvt_report_event = hab_rvt_report_event_p;
 333         hab_rvt_report_status = hab_rvt_report_status_p;
 334
 335         if (is_hab_enabled())
 336                 puts("\nSecure boot enabled\n");
 337         else
 338                 puts("\nSecure boot disabled\n");
 339
 340         /* Check HAB status */
 341         if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
 342                 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
 343                        config, state);
 344
 345                 /* Display HAB Error events */
 346                 while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
 347                                         &bytes) == HAB_SUCCESS) {
 348                         puts("\n");
 349                         printf("--------- HAB Event %d -----------------\n",
 350                                index + 1);
 351                         puts("event data:\n");
 352                         display_event(event_data, bytes);
 353                         puts("\n");
 354                         bytes = sizeof(event_data);
 355                         index++;
 356                 }
 357         }
 358         /* Display message if no HAB events are found */
 359         else {
 360                 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
 361                        config, state);
 362                 puts("No HAB Events Found!\n\n");
 363         }
 364         return 0;
 365 }
 366
 367 uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
 368 {
 369         uint32_t load_addr = 0;
 370         size_t bytes;
 371         ptrdiff_t ivt_offset = 0;
 372         int result = 0;
 373         ulong start;
 374         hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
 375         hab_rvt_entry_t *hab_rvt_entry;
 376         hab_rvt_exit_t *hab_rvt_exit;
 377
 378         hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
 379         hab_rvt_entry = hab_rvt_entry_p;
 380         hab_rvt_exit = hab_rvt_exit_p;
 381
 382         if (is_hab_enabled()) {
 383                 printf("\nAuthenticate image from DDR location 0x%x...\n",
 384                        ddr_start);
 385
 386                 hab_caam_clock_enable(1);
 387
 388                 if (hab_rvt_entry() == HAB_SUCCESS) {
 389                         /* If not already aligned, Align to ALIGN_SIZE */
 390                         ivt_offset = (image_size + ALIGN_SIZE - 1) &
 391                                         ~(ALIGN_SIZE - 1);
 392
 393                         start = ddr_start;
 394                         bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
 395 #ifdef DEBUG
 396                         printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
 397                                ivt_offset, ddr_start + ivt_offset);
 398                         puts("Dumping IVT\n");
 399                         print_buffer(ddr_start + ivt_offset,
 400                                      (void *)(ddr_start + ivt_offset),
 401                                      4, 0x8, 0);
 402
 403                         puts("Dumping CSF Header\n");
 404                         print_buffer(ddr_start + ivt_offset+IVT_SIZE,
 405                                      (void *)(ddr_start + ivt_offset+IVT_SIZE),
 406                                      4, 0x10, 0);
 407
 408                         get_hab_status();
 409
 410                         puts("\nCalling authenticate_image in ROM\n");
 411                         printf("\tivt_offset = 0x%x\n", ivt_offset);
 412                         printf("\tstart = 0x%08lx\n", start);
 413                         printf("\tbytes = 0x%x\n", bytes);
 414 #endif
 415                         /*
 416                          * If the MMU is enabled, we have to notify the ROM
 417                          * code, or it won't flush the caches when needed.
 418                          * This is done, by setting the "pu_irom_mmu_enabled"
 419                          * word to 1. You can find its address by looking in
 420                          * the ROM map. This is critical for
 421                          * authenticate_image(). If MMU is enabled, without
 422                          * setting this bit, authentication will fail and may
 423                          * crash.
 424                          */
 425                         /* Check MMU enabled */
 426                         if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
 427                                 if (is_cpu_type(MXC_CPU_MX6Q) ||
 428                                     is_cpu_type(MXC_CPU_MX6D)) {
 429                                         /*
 430                                          * This won't work on Rev 1.0.0 of
 431                                          * i.MX6Q/D, since their ROM doesn't
 432                                          * do cache flushes. don't think any
 433                                          * exist, so we ignore them.
 434                                          */
 435                                         if (!is_mx6dqp())
 436                                                 writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
 437                                 } else if (is_cpu_type(MXC_CPU_MX6DL) ||
 438                                            is_cpu_type(MXC_CPU_MX6SOLO)) {
 439                                         writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
 440                                 } else if (is_cpu_type(MXC_CPU_MX6SL)) {
 441                                         writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
 442                                 }
 443                         }
 444
 445                         load_addr = (uint32_t)hab_rvt_authenticate_image(
 446                                         HAB_CID_UBOOT,
 447                                         ivt_offset, (void **)&start,
 448                                         (size_t *)&bytes, NULL);
 449                         if (hab_rvt_exit() != HAB_SUCCESS) {
 450                                 puts("hab exit function fail\n");
 451                                 load_addr = 0;
 452                         }
 453                 } else {
 454                         puts("hab entry function fail\n");
 455                 }
 456
 457                 hab_caam_clock_enable(0);
 458
 459                 get_hab_status();
 460         } else {
 461                 puts("hab fuse not enabled\n");
 462         }
 463
 464         if ((!is_hab_enabled()) || (load_addr != 0))
 465                 result = 1;
 466
 467         return result;
 468 }
 469
 470 int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 471 {
 472         if ((argc != 1)) {
 473                 cmd_usage(cmdtp);
 474                 return 1;
 475         }
 476
 477         get_hab_status();
 478
 479         return 0;
 480 }
 481
 482 static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
 483                                 char * const argv[])
 484 {
 485         ulong   addr, ivt_offset;
 486         int     rcode = 0;
 487
 488         if (argc < 3)
 489                 return CMD_RET_USAGE;
 490
 491         addr = simple_strtoul(argv[1], NULL, 16);
 492         ivt_offset = simple_strtoul(argv[2], NULL, 16);
 493
 494         rcode = authenticate_image(addr, ivt_offset);
 495
 496         return rcode;
 497 }
 498
 499 U_BOOT_CMD(
 500                 hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
 501                 "display HAB status",
 502                 ""
 503           );
 504
 505 U_BOOT_CMD(
 506                 hab_auth_img, 3, 0, do_authenticate_image,
 507                 "authenticate image via HAB",
 508                 "addr ivt_offset\n"
 509                 "addr - image hex address\n"
 510                 "ivt_offset - hex offset of IVT in the image"
 511           );