arch/arm/dts/zynqmp-p-a2197-00-revA.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * dts file for Xilinx Versal a2197 RevA System Controller
   4  *
   5  * (C) Copyright 2019, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  */
   9 /dts-v1/;
  10
  11 #include "zynqmp.dtsi"
  12 #include "zynqmp-clk-ccf.dtsi"
  13 #include <dt-bindings/gpio/gpio.h>
  14
  15 / {
  16         model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */
  17         compatible = "xlnx,zynqmp-p-a2197-00-revA", "xlnx,zynqmp-a2197-revA",
  18                      "xlnx,zynqmp-a2197", "xlnx,zynqmp";
  19
  20         aliases {
  21                 ethernet0 = &gem0;
  22                 gpio0 = &gpio;
  23                 i2c0 = &i2c0;
  24                 i2c1 = &i2c1;
  25                 mmc0 = &sdhci0;
  26                 mmc1 = &sdhci1;
  27                 rtc0 = &rtc;
  28                 serial0 = &uart0;
  29                 serial1 = &uart1;
  30                 serial2 = &dcc;
  31                 usb0 = &usb0;
  32                 usb1 = &usb1;
  33         };
  34
  35         chosen {
  36                 bootargs = "earlycon";
  37                 stdout-path = "serial0:115200n8";
  38                 xlnx,eeprom = <&eeprom>;
  39                 /* xlnx,fmc-eeprom = FIXME */
  40         };
  41
  42         memory@0 {
  43                 device_type = "memory";
  44                 reg = <0x0 0x0 0x0 0x80000000>;
  45         };
  46 };
  47
  48 &sdhci0 { /* emmc MIO 13-23 - with some settings  16GB */
  49         status = "okay";
  50         non-removable;
  51         disable-wp;
  52         bus-width = <8>;
  53         xlnx,mio_bank = <0>;
  54 };
  55
  56 &uart0 { /* uart0 MIO38-39 */
  57         status = "okay";
  58         u-boot,dm-pre-reloc;
  59 };
  60
  61 &uart1 { /* uart1 MIO40-41 */
  62         status = "okay";
  63         u-boot,dm-pre-reloc;
  64 };
  65
  66 &sdhci1 { /* sd1 MIO45-51 cd in place */
  67         status = "okay";
  68         no-1-8-v;
  69         disable-wp;
  70         xlnx,mio_bank = <1>;
  71 };
  72
  73 &gem0 {
  74         status = "okay";
  75         phy-handle = <&phy0>;
  76         phy-mode = "sgmii"; /* DTG generates this properly  1512 */
  77         is-internal-pcspma;
  78         /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
  79         phy0: ethernet-phy@0 {
  80                 reg = <0>;
  81         };
  82 };
  83
  84 &gpio {
  85         status = "okay";
  86         gpio-line-names = "", "", "", "", "", /* 0 - 4 */
  87                   "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */
  88                   "DC_SYS_CTRL3", "DC_SYS_CTRL4", "DC_SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */
  89                   "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */
  90                   "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */
  91                   "", "", "", "", "", /* 25 - 29 */
  92                   "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */
  93                   "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */
  94                   "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */
  95                   "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */
  96                   "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */
  97                   "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */
  98                   "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */
  99                   "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */
 100                   "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */
 101                   "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */
 102                   "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */
 103                   "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */
 104                   "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */
 105                   "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */
 106                   "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */
 107                   "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */
 108                   "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */
 109                   "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */
 110                   "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */
 111                   "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */
 112                   "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */
 113                   "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */
 114                   "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */
 115                   "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */
 116                   "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */
 117                   "", "", "", "", "", /* 150 - 154 */
 118                   "", "", "", "", "", /* 155 - 159 */
 119                   "", "", "", "", "", /* 160 - 164 */
 120                   "", "", "", "", "", /* 165 - 169 */
 121                   "", "", "", ""; /* 170 - 174 */
 122 };
 123
 124 &i2c0 { /* MIO 34-35 - can't stay here */
 125         status = "okay";
 126         clock-frequency = <400000>;
 127         i2c-mux@74 { /* u33 */
 128                 compatible = "nxp,pca9548";
 129                 #address-cells = <1>;
 130                 #size-cells = <0>;
 131                 reg = <0x74>;
 132                 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
 133                 i2c@0 { /* PMBUS1 */
 134                         #address-cells = <1>;
 135                         #size-cells = <0>;
 136                         reg = <0>;
 137                         /* On connector J98 */
 138                         reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */
 139                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 140                                 reg = <0x7>;
 141                                 regulator-name = "reg_vcc_fmc";
 142                                 regulator-min-microvolt = <1800000>;
 143                                 regulator-max-microvolt = <2600000>;
 144                                 /* enable-gpio = <&gpio0 23 0x4>; optional */
 145                         };
 146                         reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */
 147                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 148                                 reg = <0x8>;
 149                         };
 150                         reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */
 151                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 152                                 reg = <0x9>;
 153                         };
 154                         reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */
 155                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 156                                 reg = <0xa>;
 157                         };
 158                         reg_vccint: tps53681@60 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */
 159                                 compatible = "ti,tps53681", "ti,tps53679";
 160                                 reg = <0x60>;
 161                                 /* vccint, vcc_io_soc */
 162                         };
 163                 };
 164                 i2c@1 { /* PMBUS1_INA226 */
 165                         #address-cells = <1>;
 166                         #size-cells = <0>;
 167                         reg = <1>;
 168                         /* FIXME check alerts coming to SC */
 169                         vcc_fmc: ina226@42 { /* u81 */
 170                                 compatible = "ti,ina226";
 171                                 reg = <0x42>;
 172                                 shunt-resistor = <5000>;
 173                         };
 174                         vcc_ram: ina226@43 { /* u82 */
 175                                 compatible = "ti,ina226";
 176                                 reg = <0x43>;
 177                                 shunt-resistor = <5000>;
 178                         };
 179                         vcc_pslp: ina226@44 { /* u84 */
 180                                 compatible = "ti,ina226";
 181                                 reg = <0x44>;
 182                                 shunt-resistor = <5000>;
 183                         };
 184                         vcc_psfp: ina226@45 { /* u87 */
 185                                 compatible = "ti,ina226";
 186                                 reg = <0x45>;
 187                                 shunt-resistor = <5000>;
 188                         };
 189                 };
 190                 i2c@2 { /* PMBUS2 */
 191                         #address-cells = <1>;
 192                         #size-cells = <0>;
 193                         reg = <2>;
 194                         /* On connector J104 */
 195                         reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */
 196                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 197                                 reg = <0xd>;
 198                         };
 199                         reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */
 200                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 201                                 reg = <0xe>;
 202                         };
 203                         reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */
 204                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 205                                 reg = <0xf>;
 206                         };
 207                         reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */
 208                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 209                                 reg = <0x10>;
 210                         };
 211                         reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */
 212                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 213                                 reg = <0x11>;
 214                         };
 215                         reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */
 216                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 217                                 reg = <0x12>;
 218                         };
 219                         reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */
 220                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 221                                 reg = <0x13>;
 222                         };
 223                         reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */
 224                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 225                                 reg = <0x14>;
 226                         };
 227                         reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */
 228                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 229                                 reg = <0x15>;
 230                         };
 231                         reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */
 232                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 233                                 reg = <0x16>;
 234                         };
 235                         reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */
 236                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 237                                 reg = <0x17>;
 238                         };
 239                         reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */
 240                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 241                                 reg = <0x19>;
 242                         };
 243                         reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */
 244                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 245                                 reg = <0x1a>;
 246                         };
 247                         reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */
 248                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 249                                 reg = <0x1b>;
 250                         };
 251                         reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */
 252                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 253                                 reg = <0x1c>;
 254                         };
 255                         reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */
 256                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 257                                 reg = <0x1d>;
 258                         };
 259                         reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */
 260                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 261                                 reg = <0x1e>;
 262                         };
 263                         reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */
 264                                 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
 265                                 reg = <0x1f>;
 266                         };
 267                 };
 268                 i2c@3 { /* PMBUS2_INA226 */
 269                         #address-cells = <1>;
 270                         #size-cells = <0>;
 271                         reg = <3>;
 272                         /* FIXME check alerts coming to SC */
 273                         vccaux: ina226@40 { /* u89 */
 274                                 compatible = "ti,ina226";
 275                                 reg = <0x40>;
 276                                 shunt-resistor = <5000>;
 277                         };
 278                         vccaux_fmc: ina226@41 { /* u91 */
 279                                 compatible = "ti,ina226";
 280                                 reg = <0x41>;
 281                                 shunt-resistor = <5000>;
 282                         };
 283                         vcco_500: ina226@42 { /* u92 */
 284                                 compatible = "ti,ina226";
 285                                 reg = <0x42>;
 286                                 shunt-resistor = <5000>;
 287                         };
 288                         vcco_501: ina226@43 { /* u94 */
 289                                 compatible = "ti,ina226";
 290                                 reg = <0x43>;
 291                                 shunt-resistor = <5000>;
 292                         };
 293                         vcco_502: ina226@44 { /* u96 */
 294                                 compatible = "ti,ina226";
 295                                 reg = <0x44>;
 296                                 shunt-resistor = <5000>;
 297                         };
 298                         vcco_503: ina226@45 { /* u98 */
 299                                 compatible = "ti,ina226";
 300                                 reg = <0x45>;
 301                                 shunt-resistor = <5000>;
 302                         };
 303                         vcc_1v8: ina226@46 { /* u100 */
 304                                 compatible = "ti,ina226";
 305                                 reg = <0x46>;
 306                                 shunt-resistor = <5000>;
 307                         };
 308                         vcc_3v3: ina226@47 { /* u103 */
 309                                 compatible = "ti,ina226";
 310                                 reg = <0x47>;
 311                                 shunt-resistor = <5000>;
 312                         };
 313                         vcc_1v2_ddr4: ina226@48 { /* u105 */
 314                                 compatible = "ti,ina226";
 315                                 reg = <0x48>;
 316                                 shunt-resistor = <1000>;
 317                         };
 318                         vcc1v1_lp4: ina226@49 { /* u107 */
 319                                 compatible = "ti,ina226";
 320                                 reg = <0x49>;
 321                                 shunt-resistor = <5000>;
 322                         };
 323                         vadj_fmc: ina226@4a { /* u110 */
 324                                 compatible = "ti,ina226";
 325                                 reg = <0x4a>;
 326                                 shunt-resistor = <5000>;
 327                         };
 328                         mgtyavcc: ina226@4b { /* u112 */
 329                                 compatible = "ti,ina226";
 330                                 reg = <0x4b>;
 331                                 shunt-resistor = <1000>;
 332                         };
 333                         mgtyavtt: ina226@4c { /* u113 */
 334                                 compatible = "ti,ina226";
 335                                 reg = <0x4c>;
 336                                 shunt-resistor = <1000>;
 337                         };
 338                         mgtyvccaux: ina226@4d { /* u116 */
 339                                 compatible = "ti,ina226";
 340                                 reg = <0x4d>;
 341                                 shunt-resistor = <5000>;
 342                         };
 343                         vcc_bat: ina226@4e { /* u12 */
 344                                 compatible = "ti,ina226";
 345                                 reg = <0x4e>;
 346                                 shunt-resistor = <10000000>; /* 10 ohm */
 347                         };
 348                 };
 349                 i2c@4 { /* LP_I2C_SM */
 350                         #address-cells = <1>;
 351                         #size-cells = <0>;
 352                         reg = <4>;
 353                         /* connected to J212G */
 354                         /* zynqmp sm alert or samtec J212H */
 355                 };
 356                 /* 5-7 unused */
 357         };
 358 };
 359
 360 &i2c1 { /* i2c1 MIO 36-37 */
 361         status = "okay";
 362         clock-frequency = <400000>;
 363
 364         /* Must be enabled via J242 */
 365         eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */
 366                 compatible = "atmel,24c02";
 367                 reg = <0x51>;
 368         };
 369
 370         i2c-mux@74 { /* u35 */
 371                 compatible = "nxp,pca9548";
 372                 #address-cells = <1>;
 373                 #size-cells = <0>;
 374                 reg = <0x74>;
 375                 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */
 376                 dc_i2c: i2c@0 { /* DC_I2C */
 377                         #address-cells = <1>;
 378                         #size-cells = <0>;
 379                         reg = <0>;
 380                         /* Use for storing information about SC board */
 381                         eeprom: eeprom@54 { /* u34 - m24128 16kB */
 382                                 compatible = "st,24c128", "atmel,24c128";
 383                                 reg = <0x54>;
 384                         };
 385                         si570_ref_clk: clock-generator@5d { /* u32 */
 386                                 #clock-cells = <0>;
 387                                 compatible = "silabs,si570";
 388                                 reg = <0x5d>;   /* 570JAC000900DG */
 389                                 temperature-stability = <50>;
 390                                 factory-fout = <33333333>;
 391                                 clock-frequency = <33333333>;
 392                                 clock-output-names = "ref_clk";
 393                         };
 394                         /* Connection via Samtec J212D */
 395                         /* Use for storing information about X-PRC card */
 396                         x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */
 397                                 compatible = "atmel,24c02";
 398                                 reg = <0x52>;
 399                         };
 400
 401                         /* Use for setting up certain features on X-PRC card */
 402                         x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */
 403                                 compatible = "nxp,pca9534";
 404                                 reg = <0x22>;
 405                                 gpio-controller; /* IRQ not connected */
 406                                 #gpio-cells = <2>;
 407                                 gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4",
 408                                                   "", "", "", "";
 409                                 gtr_sel0 {
 410                                         gpio-hog;
 411                                         gpios = <0 0>;
 412                                         input; /* FIXME add meaning */
 413                                         line-name = "sw4_1";
 414                                 };
 415                                 gtr_sel1 {
 416                                         gpio-hog;
 417                                         gpios = <1 0>;
 418                                         input; /* FIXME add meaning */
 419                                         line-name = "sw4_2";
 420                                 };
 421                                 gtr_sel2 {
 422                                         gpio-hog;
 423                                         gpios = <2 0>;
 424                                         input; /* FIXME add meaning */
 425                                         line-name = "sw4_3";
 426                                 };
 427                                 gtr_sel3 {
 428                                         gpio-hog;
 429                                         gpios = <3 0>;
 430                                         input; /* FIXME add meaning */
 431                                         line-name = "sw4_4";
 432                                 };
 433                         };
 434                 };
 435                 i2c@1 { /* FMCP1_IIC */
 436                         #address-cells = <1>;
 437                         #size-cells = <0>;
 438                         reg = <1>;
 439                         /* FIXME connection to Samtec J51C */
 440                         /* expected eeprom 0x50 SE cards */
 441                 };
 442                 i2c@2 { /* FMCP2_IIC */
 443                         #address-cells = <1>;
 444                         #size-cells = <0>;
 445                         reg = <2>;
 446                         /* FIXME connection to Samtec J53C */
 447                         /* expected eeprom 0x50 SE cards */
 448                 };
 449                 i2c@3 { /* DDR4_DIMM1 */
 450                         #address-cells = <1>;
 451                         #size-cells = <0>;
 452                         reg = <3>;
 453                         si570_ddr_dimm1: clock-generator@60 { /* u2 */
 454                                 #clock-cells = <0>;
 455                                 compatible = "silabs,si570";
 456                                 reg = <0x60>;   /* 570BAB000299DG */
 457                                 temperature-stability = <50>;
 458                                 factory-fout = <200000000>;
 459                                 clock-frequency = <200000000>;
 460                                 clock-output-names = "si570_ddrdimm1_clk";
 461                         };
 462                         /* 0x50 SPD? */
 463                 };
 464                 i2c@4 { /* DDR4_DIMM2 */
 465                         #address-cells = <1>;
 466                         #size-cells = <0>;
 467                         reg = <4>;
 468                         si570_ddr_dimm2: clock-generator@60 { /* u3 */
 469                                 #clock-cells = <0>;
 470                                 compatible = "silabs,si570";
 471                                 reg = <0x60>;   /* 570BAB000299DG */
 472                                 temperature-stability = <50>;
 473                                 factory-fout = <200000000>;
 474                                 clock-frequency = <200000000>;
 475                                 clock-output-names = "si570_ddrdimm2_clk";
 476                         };
 477                         /* 0x50 SPD? */
 478                 };
 479                 i2c@5 { /* LPDDR4_SI570_CLK */
 480                         #address-cells = <1>;
 481                         #size-cells = <0>;
 482                         reg = <5>;
 483                         si570_lpddr4: clock-generator@60 { /* u4 */
 484                                 #clock-cells = <0>;
 485                                 compatible = "silabs,si570";
 486                                 reg = <0x60>;   /* 570BAB000299DG */
 487                                 temperature-stability = <50>;
 488                                 factory-fout = <200000000>;
 489                                 clock-frequency = <200000000>;
 490                                 clock-output-names = "si570_lpddr4_clk";
 491                         };
 492                 };
 493                 i2c@6 { /* HSDP_SI570 */
 494                         #address-cells = <1>;
 495                         #size-cells = <0>;
 496                         reg = <6>;
 497                         si570_hsdp: clock-generator@5d { /* u5 */
 498                                 #clock-cells = <0>;
 499                                 compatible = "silabs,si570";
 500                                 reg = <0x5d>;   /* 570JAC000900DG */
 501                                 temperature-stability = <50>;
 502                                 factory-fout = <156250000>;
 503                                 clock-frequency = <156250000>;
 504                                 clock-output-names = "si570_hsdp_clk";
 505                         };
 506                 };
 507                 i2c@7 { /* PCIE_CLK */
 508                         #address-cells = <1>;
 509                         #size-cells = <0>;
 510                         reg = <7>;
 511                         /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
 512                         /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */
 513                         /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
 514                         clock_8t49n287: clock-generator@d8 { /* u39 8T49N240 - pcie clocking 3 */
 515                                 #clock-cells = <1>; /* author David Cater <david.cater@idt.com>*/
 516                                 compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */
 517                                 reg = <0xd8>;
 518                                 /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */
 519                                 /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */
 520
 521                         };
 522
 523                 };
 524         };
 525 };
 526
 527 &usb0 {
 528         status = "okay";
 529         xlnx,usb-polarity = <0>;
 530         xlnx,usb-reset-mode = <0>;
 531 };
 532
 533 &dwc3_0 {
 534         status = "okay";
 535         dr_mode = "peripheral";
 536         snps,dis_u2_susphy_quirk;
 537         snps,dis_u3_susphy_quirk;
 538         maximum-speed = "super-speed";
 539 };
 540
 541 &usb1 {
 542         status = "okay";
 543         xlnx,usb-polarity = <0>;
 544         xlnx,usb-reset-mode = <0>;
 545 };
 546
 547 &dwc3_1 {
 548         /delete-property/ phy-names ;
 549         /delete-property/ phys ;
 550         dr_mode = "host";
 551         maximum-speed = "high-speed";
 552         snps,dis_u2_susphy_quirk ;
 553         snps,dis_u3_susphy_quirk ;
 554         status = "okay";
 555 };
 556
 557 &xilinx_ams {
 558         status = "okay";
 559 };
 560
 561 &ams_ps {
 562         status = "okay";
 563 };
 564
 565 &ams_pl {
 566         status = "okay";
 567 };