arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * U-Boot additions
   4  *
   5  * Copyright (C) 2013 Altera Corporation <www.altera.com>
   6  * Copyright (c) 2018 Simon Goldschmidt
   7  */
   8
   9 #include "socfpga-common-u-boot.dtsi"
  10
  11 /{
  12         aliases {
  13                 spi0 = "/soc/spi@ff705000";
  14                 udc0 = &usb1;
  15         };
  16 };
  17
  18 &watchdog0 {
  19         status = "disabled";
  20 };
  21
  22 &mmc {
  23         u-boot,dm-pre-reloc;
  24 };
  25
  26 &qspi {
  27         u-boot,dm-pre-reloc;
  28 };
  29
  30 &flash {
  31         compatible = "n25q00", "jedec,spi-nor";
  32         u-boot,dm-pre-reloc;
  33 };
  34
  35 &uart0 {
  36         clock-frequency = <100000000>;
  37         u-boot,dm-pre-reloc;
  38 };
  39
  40 &uart1 {
  41         clock-frequency = <100000000>;
  42 };
  43
  44 &porta {
  45         bank-name = "porta";
  46 };
  47
  48 &portb {
  49         bank-name = "portb";
  50 };
  51
  52 &portc {
  53         bank-name = "portc";
  54 };