arch/arm/dts/rk3399-puma.dts

   1 /*
   2  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+        X11
   5  */
   6
   7 /dts-v1/;
   8 #include <dt-bindings/pwm/pwm.h>
   9 #include "rk3399.dtsi"
  10 #include "rk3399-sdram-ddr3-1333.dtsi"
  11
  12 / {
  13         model = "Theobroma Systems RK3399-Q7 SoM";
  14         compatible = "tsd,puma", "rockchip,rk3399";
  15
  16         chosen {
  17                 stdout-path = "serial0:115200n8";
  18                 u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc;
  19         };
  20
  21         aliases {
  22                 spi0 = &spi1;
  23                 spi1 = &spi5;
  24         };
  25
  26         vdd_center: vdd-center {
  27                 compatible = "pwm-regulator";
  28                 pwms = <&pwm3 0 25000 0>;
  29                 regulator-name = "vdd_center";
  30                 regulator-min-microvolt = <800000>;
  31                 regulator-max-microvolt = <1400000>;
  32                 regulator-init-microvolt = <950000>;
  33                 regulator-always-on;
  34                 regulator-boot-on;
  35                 status = "okay";
  36         };
  37
  38         vcc3v3_sys: vcc3v3-sys {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "vcc3v3_sys";
  41                 regulator-always-on;
  42                 regulator-boot-on;
  43                 regulator-min-microvolt = <3300000>;
  44                 regulator-max-microvolt = <3300000>;
  45         };
  46
  47         vcc_phy: vcc-phy-regulator {
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "vcc_phy";
  50                 regulator-always-on;
  51                 regulator-boot-on;
  52         };
  53
  54         vcc5v0_host: vcc5v0-host-en {
  55                 compatible = "regulator-fixed";
  56                 regulator-name = "vcc5v0_host";
  57                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  58         };
  59
  60         clkin_gmac: external-gmac-clock {
  61                 compatible = "fixed-clock";
  62                 clock-frequency = <125000000>;
  63                 clock-output-names = "clkin_gmac";
  64                 #clock-cells = <0>;
  65         };
  66
  67         vcc_phy: vcc-phy-regulator {
  68                 compatible = "regulator-fixed";
  69                 regulator-name = "vcc_phy";
  70                 regulator-always-on;
  71                 regulator-boot-on;
  72         };
  73 };
  74
  75 &emmc_phy {
  76         status = "okay";
  77 };
  78
  79 &pwm0 {
  80         status = "okay";
  81 };
  82
  83 &pwm2 {
  84         status = "okay";
  85 };
  86
  87 &pwm3 {
  88         status = "okay";
  89 };
  90
  91 &sdmmc {
  92         u-boot,dm-pre-reloc;
  93         bus-width = <4>;
  94         status = "okay";
  95 };
  96
  97 &sdhci {
  98         bus-width = <8>;
  99         mmc-hs400-1_8v;
 100         mmc-hs400-enhanced-strobe;
 101         non-removable;
 102         status = "okay";
 103 };
 104
 105 &uart0 {
 106         status = "okay";
 107 };
 108
 109 &uart2 {
 110         status = "okay";
 111 };
 112
 113 &usb_host0_ehci {
 114         status = "okay";
 115 };
 116
 117 &usb_host0_ohci {
 118         status = "okay";
 119 };
 120
 121 &dwc3_typec0 {
 122         status = "okay";
 123 };
 124
 125 &usb_host1_ehci {
 126         status = "okay";
 127 };
 128
 129 &usb_host1_ohci {
 130         status = "okay";
 131 };
 132
 133 &dwc3_typec1 {
 134         status = "okay";
 135 };
 136
 137 &pinctrl {
 138         pmic {
 139                 pmic_int_l: pmic-int-l {
 140                         rockchip,pins =
 141                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 142                 };
 143
 144                 pmic_dvs2: pmic-dvs2 {
 145                         rockchip,pins =
 146                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 147                 };
 148         };
 149 };
 150
 151 &gmac {
 152         phy-supply = <&vcc_phy>;
 153         phy-mode = "rgmii";
 154         clock_in_out = "input";
 155         snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
 156         snps,reset-active-low;
 157         snps,reset-delays-us = <0 10000 50000>;
 158         assigned-clocks = <&cru SCLK_RMII_SRC>;
 159         assigned-clock-parents = <&clkin_gmac>;
 160         pinctrl-names = "default";
 161         pinctrl-0 = <&rgmii_pins>;
 162         tx_delay = <0x10>;
 163         rx_delay = <0x10>;
 164         status = "okay";
 165 };
 166
 167 &spi1 {
 168         u-boot,dm-pre-reloc;
 169
 170         status = "okay";
 171
 172         #address-cells = <1>;
 173         #size-cells = <0>;
 174
 175         spiflash: w25q32dw@0 {
 176                 u-boot,dm-pre-reloc;
 177
 178                 compatible = "spi-flash";
 179                 reg = <0>;
 180                 spi-max-frequency = <5000000>;
 181                 spi-cpol;
 182                 spi-cpha;
 183         };
 184 };
 185
 186 &spi5 {
 187         status = "okay";
 188 };