arch/arm/dts/r8a7795-salvator-x.dts

   1 /*
   2  * Device Tree Source for the Salvator-X board
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /*
  12  * SSI-AK4613
  13  *
  14  * This command is required when Playback/Capture
  15  *
  16  *      amixer set "DVC Out" 100%
  17  *      amixer set "DVC In" 100%
  18  *
  19  * You can use Mute
  20  *
  21  *      amixer set "DVC Out Mute" on
  22  *      amixer set "DVC In Mute" on
  23  *
  24  * You can use Volume Ramp
  25  *
  26  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
  27  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  28  *      amixer set "DVC Out Ramp" on
  29  *      aplay xxx.wav &
  30  *      amixer set "DVC Out"  80%  // Volume Down
  31  *      amixer set "DVC Out" 100%  // Volume Up
  32  */
  33
  34 /dts-v1/;
  35 #include "r8a7795.dtsi"
  36 #include <dt-bindings/gpio/gpio.h>
  37
  38 / {
  39         model = "Renesas Salvator-X board based on r8a7795";
  40         compatible = "renesas,salvator-x", "renesas,r8a7795";
  41
  42         aliases {
  43                 serial0 = &scif2;
  44                 serial1 = &scif1;
  45                 ethernet0 = &avb;
  46         };
  47
  48         chosen {
  49                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  50                 stdout-path = "serial0:115200n8";
  51         };
  52
  53         memory@48000000 {
  54                 device_type = "memory";
  55                 /* first 128MB is reserved for secure area. */
  56                 reg = <0x0 0x48000000 0x0 0x38000000>;
  57         };
  58
  59         x12_clk: x12 {
  60                 compatible = "fixed-clock";
  61                 #clock-cells = <0>;
  62                 clock-frequency = <24576000>;
  63         };
  64
  65         reg_1p8v: regulator0 {
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "fixed-1.8V";
  68                 regulator-min-microvolt = <1800000>;
  69                 regulator-max-microvolt = <1800000>;
  70                 regulator-boot-on;
  71                 regulator-always-on;
  72         };
  73
  74         reg_3p3v: regulator1 {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "fixed-3.3V";
  77                 regulator-min-microvolt = <3300000>;
  78                 regulator-max-microvolt = <3300000>;
  79                 regulator-boot-on;
  80                 regulator-always-on;
  81         };
  82
  83         vcc_sdhi0: regulator-vcc-sdhi0 {
  84                 compatible = "regulator-fixed";
  85
  86                 regulator-name = "SDHI0 Vcc";
  87                 regulator-min-microvolt = <3300000>;
  88                 regulator-max-microvolt = <3300000>;
  89
  90                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  91                 enable-active-high;
  92         };
  93
  94         vccq_sdhi0: regulator-vccq-sdhi0 {
  95                 compatible = "regulator-gpio";
  96
  97                 regulator-name = "SDHI0 VccQ";
  98                 regulator-min-microvolt = <1800000>;
  99                 regulator-max-microvolt = <3300000>;
 100
 101                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 102                 gpios-states = <1>;
 103                 states = <3300000 1
 104                           1800000 0>;
 105         };
 106
 107         vcc_sdhi3: regulator-vcc-sdhi3 {
 108                 compatible = "regulator-fixed";
 109
 110                 regulator-name = "SDHI3 Vcc";
 111                 regulator-min-microvolt = <3300000>;
 112                 regulator-max-microvolt = <3300000>;
 113
 114                 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
 115                 enable-active-high;
 116         };
 117
 118         vccq_sdhi3: regulator-vccq-sdhi3 {
 119                 compatible = "regulator-gpio";
 120
 121                 regulator-name = "SDHI3 VccQ";
 122                 regulator-min-microvolt = <1800000>;
 123                 regulator-max-microvolt = <3300000>;
 124
 125                 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
 126                 gpios-states = <1>;
 127                 states = <3300000 1
 128                           1800000 0>;
 129         };
 130
 131         vbus0_usb2: regulator-vbus0-usb2 {
 132                 compatible = "regulator-fixed";
 133
 134                 regulator-name = "USB20_VBUS0";
 135                 regulator-min-microvolt = <5000000>;
 136                 regulator-max-microvolt = <5000000>;
 137
 138                 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
 139                 enable-active-high;
 140         };
 141
 142         audio_clkout: audio_clkout {
 143                 /*
 144                  * This is same as <&rcar_sound 0>
 145                  * but needed to avoid cs2000/rcar_sound probe dead-lock
 146                  */
 147                 compatible = "fixed-clock";
 148                 #clock-cells = <0>;
 149                 clock-frequency = <11289600>;
 150         };
 151
 152         rsnd_ak4613: sound {
 153                 compatible = "simple-audio-card";
 154
 155                 simple-audio-card,format = "left_j";
 156                 simple-audio-card,bitclock-master = <&sndcpu>;
 157                 simple-audio-card,frame-master = <&sndcpu>;
 158
 159                 sndcpu: simple-audio-card,cpu {
 160                         sound-dai = <&rcar_sound>;
 161                 };
 162
 163                 sndcodec: simple-audio-card,codec {
 164                         sound-dai = <&ak4613>;
 165                 };
 166         };
 167
 168         vga-encoder {
 169                 compatible = "adi,adv7123";
 170
 171                 ports {
 172                         #address-cells = <1>;
 173                         #size-cells = <0>;
 174
 175                         port@0 {
 176                                 reg = <0>;
 177                                 adv7123_in: endpoint {
 178                                         remote-endpoint = <&du_out_rgb>;
 179                                 };
 180                         };
 181                         port@1 {
 182                                 reg = <1>;
 183                                 adv7123_out: endpoint {
 184                                         remote-endpoint = <&vga_in>;
 185                                 };
 186                         };
 187                 };
 188         };
 189
 190         vga {
 191                 compatible = "vga-connector";
 192
 193                 port {
 194                         vga_in: endpoint {
 195                                 remote-endpoint = <&adv7123_out>;
 196                         };
 197                 };
 198         };
 199 };
 200
 201 &du {
 202         pinctrl-0 = <&du_pins>;
 203         pinctrl-names = "default";
 204         status = "okay";
 205
 206         ports {
 207                 port@0 {
 208                         endpoint {
 209                                 remote-endpoint = <&adv7123_in>;
 210                         };
 211                 };
 212                 port@3 {
 213                         lvds_connector: endpoint {
 214                         };
 215                 };
 216         };
 217 };
 218
 219 &extal_clk {
 220         clock-frequency = <16666666>;
 221 };
 222
 223 &extalr_clk {
 224         clock-frequency = <32768>;
 225 };
 226
 227 &pfc {
 228         pinctrl-0 = <&scif_clk_pins>;
 229         pinctrl-names = "default";
 230
 231         scif1_pins: scif1 {
 232                 groups = "scif1_data_a", "scif1_ctrl";
 233                 function = "scif1";
 234         };
 235         scif2_pins: scif2 {
 236                 groups = "scif2_data_a";
 237                 function = "scif2";
 238         };
 239         scif_clk_pins: scif_clk {
 240                 groups = "scif_clk_a";
 241                 function = "scif_clk";
 242         };
 243
 244         i2c2_pins: i2c2 {
 245                 groups = "i2c2_a";
 246                 function = "i2c2";
 247         };
 248
 249         avb_pins: avb {
 250                 mux {
 251                         groups = "avb_link", "avb_phy_int", "avb_mdc",
 252                                  "avb_mii";
 253                         function = "avb";
 254                 };
 255
 256                 pins_mdc {
 257                         groups = "avb_mdc";
 258                         drive-strength = <24>;
 259                 };
 260
 261                 pins_mii_tx {
 262                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 263                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 264                         drive-strength = <12>;
 265                 };
 266         };
 267
 268         du_pins: du {
 269                 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
 270                 function = "du";
 271         };
 272
 273         sdhi0_pins: sd0 {
 274                 groups = "sdhi0_data4", "sdhi0_ctrl";
 275                 function = "sdhi0";
 276                 power-source = <3300>;
 277         };
 278
 279         sdhi0_pins_uhs: sd0_uhs {
 280                 groups = "sdhi0_data4", "sdhi0_ctrl";
 281                 function = "sdhi0";
 282                 power-source = <1800>;
 283         };
 284
 285         sdhi2_pins: sd2 {
 286                 groups = "sdhi2_data8", "sdhi2_ctrl";
 287                 function = "sdhi2";
 288                 power-source = <3300>;
 289         };
 290
 291         sdhi2_pins_uhs: sd2_uhs {
 292                 groups = "sdhi2_data8", "sdhi2_ctrl";
 293                 function = "sdhi2";
 294                 power-source = <1800>;
 295         };
 296
 297         sdhi3_pins: sd3 {
 298                 groups = "sdhi3_data4", "sdhi3_ctrl";
 299                 function = "sdhi3";
 300                 power-source = <3300>;
 301         };
 302
 303         sdhi3_pins_uhs: sd3_uhs {
 304                 groups = "sdhi3_data4", "sdhi3_ctrl";
 305                 function = "sdhi3";
 306                 power-source = <1800>;
 307         };
 308
 309         sound_pins: sound {
 310                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 311                 function = "ssi";
 312         };
 313
 314         sound_clk_pins: sound_clk {
 315                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 316                          "audio_clkout_a", "audio_clkout3_a";
 317                 function = "audio_clk";
 318         };
 319
 320         usb0_pins: usb0 {
 321                 groups = "usb0";
 322                 function = "usb0";
 323         };
 324
 325         usb1_pins: usb1 {
 326                 mux {
 327                         groups = "usb1";
 328                         function = "usb1";
 329                 };
 330
 331                 ovc {
 332                         pins = "GP_6_27";
 333                         bias-pull-up;
 334                 };
 335
 336                 pwen {
 337                         pins = "GP_6_26";
 338                         bias-pull-down;
 339                 };
 340         };
 341
 342         usb2_pins: usb2 {
 343                 groups = "usb2";
 344                 function = "usb2";
 345         };
 346 };
 347
 348 &scif1 {
 349         pinctrl-0 = <&scif1_pins>;
 350         pinctrl-names = "default";
 351
 352         uart-has-rtscts;
 353         status = "okay";
 354 };
 355
 356 &scif2 {
 357         pinctrl-0 = <&scif2_pins>;
 358         pinctrl-names = "default";
 359
 360         status = "okay";
 361 };
 362
 363 &scif_clk {
 364         clock-frequency = <14745600>;
 365 };
 366
 367 &i2c2 {
 368         pinctrl-0 = <&i2c2_pins>;
 369         pinctrl-names = "default";
 370
 371         status = "okay";
 372
 373         clock-frequency = <100000>;
 374
 375         ak4613: codec@10 {
 376                 compatible = "asahi-kasei,ak4613";
 377                 #sound-dai-cells = <0>;
 378                 reg = <0x10>;
 379                 clocks = <&rcar_sound 3>;
 380
 381                 asahi-kasei,in1-single-end;
 382                 asahi-kasei,in2-single-end;
 383                 asahi-kasei,out1-single-end;
 384                 asahi-kasei,out2-single-end;
 385                 asahi-kasei,out3-single-end;
 386                 asahi-kasei,out4-single-end;
 387                 asahi-kasei,out5-single-end;
 388                 asahi-kasei,out6-single-end;
 389         };
 390
 391         cs2000: clk_multiplier@4f {
 392                 #clock-cells = <0>;
 393                 compatible = "cirrus,cs2000-cp";
 394                 reg = <0x4f>;
 395                 clocks = <&audio_clkout>, <&x12_clk>;
 396                 clock-names = "clk_in", "ref_clk";
 397
 398                 assigned-clocks = <&cs2000>;
 399                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 400         };
 401 };
 402
 403 &rcar_sound {
 404         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 405         pinctrl-names = "default";
 406
 407         /* Single DAI */
 408         #sound-dai-cells = <0>;
 409
 410         /* audio_clkout0/1/2/3 */
 411         #clock-cells = <1>;
 412         clock-frequency = <11289600>;
 413
 414         status = "okay";
 415
 416         /* update <audio_clk_b> to <cs2000> */
 417         clocks = <&cpg CPG_MOD 1005>,
 418                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 419                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 420                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 421                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 422                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 423                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 424                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 425                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 426                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 427                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 428                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 429                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 430                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 431                  <&audio_clk_a>, <&cs2000>,
 432                  <&audio_clk_c>,
 433                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 434
 435         rcar_sound,dai {
 436                 dai0 {
 437                         playback = <&ssi0 &src0 &dvc0>;
 438                         capture  = <&ssi1 &src1 &dvc1>;
 439                 };
 440         };
 441 };
 442
 443 &sata {
 444         status = "okay";
 445 };
 446
 447 &sdhi0 {
 448         pinctrl-0 = <&sdhi0_pins>;
 449         pinctrl-1 = <&sdhi0_pins_uhs>;
 450         pinctrl-names = "default", "state_uhs";
 451
 452         vmmc-supply = <&vcc_sdhi0>;
 453         vqmmc-supply = <&vccq_sdhi0>;
 454         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 455         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 456         bus-width = <4>;
 457         sd-uhs-sdr50;
 458         status = "okay";
 459 };
 460
 461 &sdhi2 {
 462         /* used for on-board 8bit eMMC */
 463         pinctrl-0 = <&sdhi2_pins>;
 464         pinctrl-1 = <&sdhi2_pins_uhs>;
 465         pinctrl-names = "default", "state_uhs";
 466
 467         vmmc-supply = <&reg_3p3v>;
 468         vqmmc-supply = <&reg_1p8v>;
 469         bus-width = <8>;
 470         non-removable;
 471         status = "okay";
 472 };
 473
 474 &sdhi3 {
 475         pinctrl-0 = <&sdhi3_pins>;
 476         pinctrl-1 = <&sdhi3_pins_uhs>;
 477         pinctrl-names = "default", "state_uhs";
 478
 479         vmmc-supply = <&vcc_sdhi3>;
 480         vqmmc-supply = <&vccq_sdhi3>;
 481         cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 482         wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
 483         bus-width = <4>;
 484         sd-uhs-sdr50;
 485         status = "okay";
 486 };
 487
 488 &ssi1 {
 489         shared-pin;
 490 };
 491
 492 &wdt0 {
 493         timeout-sec = <60>;
 494         status = "okay";
 495 };
 496
 497 &audio_clk_a {
 498         clock-frequency = <22579200>;
 499 };
 500
 501 &i2c_dvfs {
 502         status = "okay";
 503 };
 504
 505 &avb {
 506         pinctrl-0 = <&avb_pins>;
 507         pinctrl-names = "default";
 508         renesas,no-ether-link;
 509         phy-handle = <&phy0>;
 510         status = "okay";
 511
 512         phy0: ethernet-phy@0 {
 513                 rxc-skew-ps = <1500>;
 514                 reg = <0>;
 515                 interrupt-parent = <&gpio2>;
 516                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 517         };
 518 };
 519
 520 &xhci0 {
 521         status = "okay";
 522 };
 523
 524 &usb2_phy0 {
 525         pinctrl-0 = <&usb0_pins>;
 526         pinctrl-names = "default";
 527
 528         vbus-supply = <&vbus0_usb2>;
 529         status = "okay";
 530 };
 531
 532 &usb2_phy1 {
 533         pinctrl-0 = <&usb1_pins>;
 534         pinctrl-names = "default";
 535
 536         status = "okay";
 537 };
 538
 539 &usb2_phy2 {
 540         pinctrl-0 = <&usb2_pins>;
 541         pinctrl-names = "default";
 542
 543         status = "okay";
 544 };
 545
 546 &ehci0 {
 547         status = "okay";
 548 };
 549
 550 &ehci1 {
 551         status = "okay";
 552 };
 553
 554 &ehci2 {
 555         status = "okay";
 556 };
 557
 558 &ohci0 {
 559         status = "okay";
 560 };
 561
 562 &ohci1 {
 563         status = "okay";
 564 };
 565
 566 &ohci2 {
 567         status = "okay";
 568 };
 569
 570 &hsusb {
 571         status = "okay";
 572 };
 573
 574 &pcie_bus_clk {
 575         clock-frequency = <100000000>;
 576 };
 577
 578 &pciec0 {
 579         status = "okay";
 580 };
 581
 582 &pciec1 {
 583         status = "okay";
 584 };