arch/arm/dts/r8a7794-alt.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Alt board
   4  *
   5  * Copyright (C) 2014 Renesas Electronics Corporation
   6  */
   7
   8 /dts-v1/;
   9 #include "r8a7794.dtsi"
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 / {
  13         model = "Alt";
  14         compatible = "renesas,alt", "renesas,r8a7794";
  15
  16         aliases {
  17                 serial0 = &scif2;
  18                 i2c9 = &gpioi2c1;
  19                 i2c10 = &gpioi2c4;
  20                 i2c11 = &i2chdmi;
  21                 i2c12 = &i2cexio4;
  22         };
  23
  24         chosen {
  25                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         memory@40000000 {
  30                 device_type = "memory";
  31                 reg = <0 0x40000000 0 0x40000000>;
  32         };
  33
  34         d3_3v: regulator-d3-3v {
  35                 compatible = "regulator-fixed";
  36                 regulator-name = "D3.3V";
  37                 regulator-min-microvolt = <3300000>;
  38                 regulator-max-microvolt = <3300000>;
  39                 regulator-boot-on;
  40                 regulator-always-on;
  41         };
  42
  43         vcc_sdhi0: regulator-vcc-sdhi0 {
  44                 compatible = "regulator-fixed";
  45
  46                 regulator-name = "SDHI0 Vcc";
  47                 regulator-min-microvolt = <3300000>;
  48                 regulator-max-microvolt = <3300000>;
  49
  50                 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
  51                 enable-active-high;
  52         };
  53
  54         vccq_sdhi0: regulator-vccq-sdhi0 {
  55                 compatible = "regulator-gpio";
  56
  57                 regulator-name = "SDHI0 VccQ";
  58                 regulator-min-microvolt = <1800000>;
  59                 regulator-max-microvolt = <3300000>;
  60
  61                 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
  62                 gpios-states = <1>;
  63                 states = <3300000 1
  64                           1800000 0>;
  65         };
  66
  67         vcc_sdhi1: regulator-vcc-sdhi1 {
  68                 compatible = "regulator-fixed";
  69
  70                 regulator-name = "SDHI1 Vcc";
  71                 regulator-min-microvolt = <3300000>;
  72                 regulator-max-microvolt = <3300000>;
  73
  74                 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
  75                 enable-active-high;
  76         };
  77
  78         vccq_sdhi1: regulator-vccq-sdhi1 {
  79                 compatible = "regulator-gpio";
  80
  81                 regulator-name = "SDHI1 VccQ";
  82                 regulator-min-microvolt = <1800000>;
  83                 regulator-max-microvolt = <3300000>;
  84
  85                 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  86                 gpios-states = <1>;
  87                 states = <3300000 1
  88                           1800000 0>;
  89         };
  90
  91         lbsc {
  92                 #address-cells = <1>;
  93                 #size-cells = <1>;
  94         };
  95
  96         vga-encoder {
  97                 compatible = "adi,adv7123";
  98
  99                 ports {
 100                         #address-cells = <1>;
 101                         #size-cells = <0>;
 102
 103                         port@0 {
 104                                 reg = <0>;
 105                                 adv7123_in: endpoint {
 106                                         remote-endpoint = <&du_out_rgb1>;
 107                                 };
 108                         };
 109                         port@1 {
 110                                 reg = <1>;
 111                                 adv7123_out: endpoint {
 112                                         remote-endpoint = <&vga_in>;
 113                                 };
 114                         };
 115                 };
 116         };
 117
 118         vga {
 119                 compatible = "vga-connector";
 120
 121                 port {
 122                         vga_in: endpoint {
 123                                 remote-endpoint = <&adv7123_out>;
 124                         };
 125                 };
 126         };
 127
 128         x2_clk: x2-clock {
 129                 compatible = "fixed-clock";
 130                 #clock-cells = <0>;
 131                 clock-frequency = <74250000>;
 132         };
 133
 134         x13_clk: x13-clock {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 clock-frequency = <148500000>;
 138         };
 139
 140         gpioi2c1: i2c-9 {
 141                 #address-cells = <1>;
 142                 #size-cells = <0>;
 143                 compatible = "i2c-gpio";
 144                 status = "disabled";
 145                 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 146                 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 147         };
 148
 149         gpioi2c4: i2c-10 {
 150                 #address-cells = <1>;
 151                 #size-cells = <0>;
 152                 compatible = "i2c-gpio";
 153                 status = "disabled";
 154                 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 155                 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 156                 i2c-gpio,delay-us = <5>;
 157         };
 158
 159         /*
 160          * A fallback to GPIO is provided for I2C1.
 161          */
 162         i2chdmi: i2c-11 {
 163                 compatible = "i2c-demux-pinctrl";
 164                 i2c-parent = <&i2c1>, <&gpioi2c1>;
 165                 i2c-bus-name = "i2c-hdmi";
 166                 #address-cells = <1>;
 167                 #size-cells = <0>;
 168
 169                 composite-in@20 {
 170                         compatible = "adi,adv7180";
 171                         reg = <0x20>;
 172                         remote = <&vin0>;
 173
 174                         port {
 175                                 adv7180: endpoint {
 176                                         bus-width = <8>;
 177                                         remote-endpoint = <&vin0ep>;
 178                                 };
 179                         };
 180                 };
 181
 182                 eeprom@50 {
 183                         compatible = "renesas,r1ex24002", "atmel,24c02";
 184                         reg = <0x50>;
 185                         pagesize = <16>;
 186                 };
 187         };
 188
 189         /*
 190          * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
 191          * A fallback to GPIO is provided.
 192          */
 193         i2cexio4: i2c-14 {
 194                 compatible = "i2c-demux-pinctrl";
 195                 i2c-parent = <&i2c4>, <&gpioi2c4>;
 196                 i2c-bus-name = "i2c-exio4";
 197                 #address-cells = <1>;
 198                 #size-cells = <0>;
 199         };
 200 };
 201
 202 &du {
 203         pinctrl-0 = <&du_pins>;
 204         pinctrl-names = "default";
 205         status = "okay";
 206
 207         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
 208                  <&x13_clk>, <&x2_clk>;
 209         clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
 210
 211         ports {
 212                 port@1 {
 213                         endpoint {
 214                                 remote-endpoint = <&adv7123_in>;
 215                         };
 216                 };
 217         };
 218 };
 219
 220 &extal_clk {
 221         clock-frequency = <20000000>;
 222 };
 223
 224 &pfc {
 225         pinctrl-0 = <&scif_clk_pins>;
 226         pinctrl-names = "default";
 227
 228         du_pins: du {
 229                 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
 230                 function = "du1";
 231         };
 232
 233         scif2_pins: scif2 {
 234                 groups = "scif2_data";
 235                 function = "scif2";
 236         };
 237
 238         scif_clk_pins: scif_clk {
 239                 groups = "scif_clk";
 240                 function = "scif_clk";
 241         };
 242
 243         ether_pins: ether {
 244                 groups = "eth_link", "eth_mdio", "eth_rmii";
 245                 function = "eth";
 246         };
 247
 248         phy1_pins: phy1 {
 249                 groups = "intc_irq8";
 250                 function = "intc";
 251         };
 252
 253         i2c1_pins: i2c1 {
 254                 groups = "i2c1";
 255                 function = "i2c1";
 256         };
 257
 258         i2c4_pins: i2c4 {
 259                 groups = "i2c4";
 260                 function = "i2c4";
 261         };
 262
 263         vin0_pins: vin0 {
 264                 groups = "vin0_data8", "vin0_clk";
 265                 function = "vin0";
 266         };
 267
 268         mmcif0_pins: mmcif0 {
 269                 groups = "mmc_data8", "mmc_ctrl";
 270                 function = "mmc";
 271         };
 272
 273         sdhi0_pins: sd0 {
 274                 groups = "sdhi0_data4", "sdhi0_ctrl";
 275                 function = "sdhi0";
 276                 power-source = <3300>;
 277         };
 278
 279         sdhi0_pins_uhs: sd0_uhs {
 280                 groups = "sdhi0_data4", "sdhi0_ctrl";
 281                 function = "sdhi0";
 282                 power-source = <1800>;
 283         };
 284
 285         sdhi1_pins: sd1 {
 286                 groups = "sdhi1_data4", "sdhi1_ctrl";
 287                 function = "sdhi1";
 288                 power-source = <3300>;
 289         };
 290
 291         sdhi1_pins_uhs: sd1_uhs {
 292                 groups = "sdhi1_data4", "sdhi1_ctrl";
 293                 function = "sdhi1";
 294                 power-source = <1800>;
 295         };
 296 };
 297
 298 &cmt0 {
 299         status = "okay";
 300 };
 301
 302 &pfc {
 303         qspi_pins: qspi {
 304                 groups = "qspi_ctrl", "qspi_data4";
 305                 function = "qspi";
 306         };
 307 };
 308
 309 &ether {
 310         pinctrl-0 = <&ether_pins &phy1_pins>;
 311         pinctrl-names = "default";
 312
 313         phy-handle = <&phy1>;
 314         renesas,ether-link-active-low;
 315         status = "okay";
 316
 317         phy1: ethernet-phy@1 {
 318                 reg = <1>;
 319                 interrupt-parent = <&irqc0>;
 320                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
 321                 micrel,led-mode = <1>;
 322         };
 323 };
 324
 325 &mmcif0 {
 326         pinctrl-0 = <&mmcif0_pins>;
 327         pinctrl-names = "default";
 328
 329         vmmc-supply = <&d3_3v>;
 330         vqmmc-supply = <&d3_3v>;
 331         bus-width = <8>;
 332         non-removable;
 333         status = "okay";
 334 };
 335
 336 &rwdt {
 337         timeout-sec = <60>;
 338         status = "okay";
 339 };
 340
 341 &sdhi0 {
 342         pinctrl-0 = <&sdhi0_pins>;
 343         pinctrl-1 = <&sdhi0_pins_uhs>;
 344         pinctrl-names = "default", "state_uhs";
 345
 346         vmmc-supply = <&vcc_sdhi0>;
 347         vqmmc-supply = <&vccq_sdhi0>;
 348         cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
 349         wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
 350         sd-uhs-sdr50;
 351         sd-uhs-sdr104;
 352         status = "okay";
 353 };
 354
 355 &sdhi1 {
 356         pinctrl-0 = <&sdhi1_pins>;
 357         pinctrl-1 = <&sdhi1_pins_uhs>;
 358         pinctrl-names = "default", "state_uhs";
 359
 360         vmmc-supply = <&vcc_sdhi1>;
 361         vqmmc-supply = <&vccq_sdhi1>;
 362         cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
 363         wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
 364         sd-uhs-sdr50;
 365         status = "okay";
 366 };
 367
 368 &i2c1 {
 369         pinctrl-0 = <&i2c1_pins>;
 370         pinctrl-names = "i2c-hdmi";
 371
 372         clock-frequency = <400000>;
 373 };
 374
 375 &i2c4 {
 376         pinctrl-0 = <&i2c4_pins>;
 377         pinctrl-names = "i2c-exio4";
 378 };
 379
 380 &vin0 {
 381         status = "okay";
 382         pinctrl-0 = <&vin0_pins>;
 383         pinctrl-names = "default";
 384
 385         port {
 386                 vin0ep: endpoint {
 387                         remote-endpoint = <&adv7180>;
 388                         bus-width = <8>;
 389                 };
 390         };
 391 };
 392
 393 &scif2 {
 394         pinctrl-0 = <&scif2_pins>;
 395         pinctrl-names = "default";
 396
 397         status = "okay";
 398 };
 399
 400 &scif_clk {
 401         clock-frequency = <14745600>;
 402 };
 403
 404 &qspi {
 405         pinctrl-0 = <&qspi_pins>;
 406         pinctrl-names = "default";
 407
 408         status = "okay";
 409
 410         flash@0 {
 411                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 412                 reg = <0>;
 413                 spi-max-frequency = <30000000>;
 414                 spi-tx-bus-width = <4>;
 415                 spi-rx-bus-width = <4>;
 416                 spi-cpol;
 417                 spi-cpha;
 418                 m25p,fast-read;
 419
 420                 partitions {
 421                         compatible = "fixed-partitions";
 422                         #address-cells = <1>;
 423                         #size-cells = <1>;
 424
 425                         partition@0 {
 426                                 label = "loader";
 427                                 reg = <0x00000000 0x00040000>;
 428                                 read-only;
 429                         };
 430                         partition@40000 {
 431                                 label = "system";
 432                                 reg = <0x00040000 0x00040000>;
 433                                 read-only;
 434                         };
 435                         partition@80000 {
 436                                 label = "user";
 437                                 reg = <0x00080000 0x03f80000>;
 438                         };
 439                 };
 440         };
 441 };