arm: dts: k3-j721e: Add ddr node
[oweals/u-boot.git] / arch / arm / dts / k3-j721e-r5-common-proc-board.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4  */
5
6 /dts-v1/;
7
8 #include "k3-j721e-som-p0.dtsi"
9 #include "k3-j721e-ddr-evm-lp4-3733.dtsi"
10 #include "k3-j721e-ddr.dtsi"
11
12 / {
13         aliases {
14                 remoteproc0 = &sysctrler;
15                 remoteproc1 = &a72_0;
16         };
17
18         chosen {
19                 stdout-path = "serial2:115200n8";
20                 tick-timer = &timer1;
21         };
22
23         a72_0: a72@0 {
24                 compatible = "ti,am654-rproc";
25                 reg = <0x0 0x00a90000 0x0 0x10>;
26                 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
27                                 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
28                 resets = <&k3_reset 202 0>;
29                 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
30                 assigned-clock-rates = <2000000000>, <200000000>;
31                 ti,sci = <&dmsc>;
32                 ti,sci-proc-id = <32>;
33                 ti,sci-host-id = <10>;
34                 u-boot,dm-spl;
35         };
36
37         clk_200mhz: dummy_clock {
38                 compatible = "fixed-clock";
39                 #clock-cells = <0>;
40                 clock-frequency = <200000000>;
41                 u-boot,dm-spl;
42         };
43 };
44
45 &cbass_mcu_wakeup {
46         mcu_secproxy: secproxy@28380000 {
47                 u-boot,dm-spl;
48                 compatible = "ti,am654-secure-proxy";
49                 reg = <0x0 0x2a380000 0x0 0x80000>,
50                       <0x0 0x2a400000 0x0 0x80000>,
51                       <0x0 0x2a480000 0x0 0x80000>;
52                 reg-names = "rt", "scfg", "target_data";
53                 #mbox-cells = <1>;
54         };
55
56         sysctrler: sysctrler {
57                 u-boot,dm-spl;
58                 compatible = "ti,am654-system-controller";
59                 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
60                 mbox-names = "tx", "rx";
61         };
62 };
63
64 &dmsc {
65         mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
66         mbox-names = "tx", "rx", "notify";
67         ti,host-id = <4>;
68         ti,secure-host;
69 };
70
71 &wkup_pmx0 {
72         wkup_uart0_pins_default: wkup_uart0_pins_default {
73                 u-boot,dm-spl;
74                 pinctrl-single,pins = <
75                         J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
76                         J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
77                 >;
78         };
79
80         mcu_uart0_pins_default: mcu_uart0_pins_default {
81                 u-boot,dm-spl;
82                 pinctrl-single,pins = <
83                         J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */
84                         J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
85                         J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
86                         J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
87                 >;
88         };
89 };
90
91 &main_pmx0 {
92         main_uart0_pins_default: main_uart0_pins_default {
93                 u-boot,dm-spl;
94                 pinctrl-single,pins = <
95                         J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */
96                         J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
97                         J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
98                         J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
99                 >;
100         };
101 };
102
103 &wkup_uart0 {
104         u-boot,dm-spl;
105         pinctrl-names = "default";
106         pinctrl-0 = <&wkup_uart0_pins_default>;
107         status = "okay";
108 };
109
110 &mcu_uart0 {
111         pinctrl-names = "default";
112         pinctrl-0 = <&mcu_uart0_pins_default>;
113         status = "okay";
114 };
115
116 &main_uart0 {
117         pinctrl-names = "default";
118         pinctrl-0 = <&main_uart0_pins_default>;
119         status = "okay";
120         power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
121 };
122
123 &main_sdhci0 {
124         /delete-property/ power-domains;
125         /delete-property/ assigned-clocks;
126         /delete-property/ assigned-clock-parents;
127         clock-names = "clk_xin";
128         clocks = <&clk_200mhz>;
129         ti,driver-strength-ohm = <50>;
130         non-removable;
131         bus-width = <8>;
132 };
133
134 &main_sdhci1 {
135         /delete-property/ power-domains;
136         /delete-property/ assigned-clocks;
137         /delete-property/ assigned-clock-parents;
138         clock-names = "clk_xin";
139         clocks = <&clk_200mhz>;
140         ti,driver-strength-ohm = <50>;
141 };
142
143 #include "k3-j721e-common-proc-board-u-boot.dtsi"